Product category:
Microprocessors, Microcontrollers and DSPs
News Release from: SandCraft | Subject: SR71000
Edited by the Electronicstalk Editorial
Team on 18 October 2001
MIPS processor runs up to 800MHz
SandCraft has announced its first product, a MIPS processor with speed grades up to 800MHz.
SandCraft has announced its first product, a MIPS processor with speed grades up to 800MHz The SR71000 is sampling now to qualified customers in 600 and 500MHz speed grades, and samples of the 800MHz speed grade will be available in Q1 2002
This article was originally published on Electronicstalk on 24 Dec 2007 at 8.00am (UK)
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With its high-frequency capability, large caches and advanced pipeline architecture, the SR71000 provides the highest performance of any embedded MIPS processor on the market today.
This scalable architecture will migrate to GHz rates and beyond.
The SR71000 is SandCraft's own implementation of the MIPS64 instruction set architecture and incorporates a deeply staged multipipelined design with dynamic branch prediction and low power consumption.
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At the heart of the processor is a single MIPS64 CPU core.
The SR71000 is pin-compatible with current MIPS microprocessors of lesser performance, which permits easy adoption.
By relying on a verified, stable, proven architecture, SandCraft reduces the risk of development for its customers and lets them rapidly offer new product enhancements, and improve system performance, while preserving their current hardware and software platforms.
SandCraft has carefully crafted the SR71000 to achieve the maximum speed and efficiency demanded by high performance embedded applications, such as networking and imaging applications.
This MIPS64-class processor can issue and execute up to six instructions per clock cycle, into a pipeline that uses out-of-order issue and dispatch, and in-order retirement.
Its highly efficient, two-way superscalar architecture incorporates dual instruction fetch, dual dispatch and dual commit, to maintain a throughput of two instructions per cycle.
The processor has a nine-stage superscalar pipeline for high clock frequency, with a pipeline-bypass architecture optimised for minimising instruction-independent stalls.
Its sophisticated, dynamic branch prediction capability sustains performance with 97% accuracy, by keeping the pipeline fully used and minimising branch mispredictions.
The implementation methodology of the CPU allows it to be rapidly migrated to more advanced processes and therefore higher clock frequencies, without necessitating changes to the pipeline architecture.
This ensures that a customer's investment in developing with this architecture will be protected as process technology advances.
The SR71000 optimises system performance and reduces system cost with integrated on-chip memory, including 32Kbyte each of primary instruction and primary data cache; 512Kbyte of unified secondary cache; and tertiary cache control, including on-chip tertiary cache tags that can support up to 16Mbyte of external tertiary cache using commodity SRAMs.
The four-way set associative primary caches and eight-way set associative secondary and tertiary caches provide capacity and rapid access to critical data and instructions.
The processor also supports cache line locking and prefetching for improved performance.
The SR71000's high performance 64bit system interface is fully compatible with existing implementations of the MIPS address and data interface, known as SysAD, operating at an interface bus frequency of up to 133 MHz, with split transactions and out-of-order return.
The SR71000 is a fully static design with dynamic energy-saving features that provide very low power dissipation for its high level of performance.
For example, at clock speeds of 600MHz, it consumes less than 4W.
At 800MHz, it will consume less than 5W.
The chip's high performance floating-point unit is fully MIPS64-compliant and is decoupled from the integer pipeline for autonomous integer and floating-point operations.
The SR71000 support toolkit includes a comprehensive set of simulation tools and development boards.
The SR71000 leverages standard third-party software tools, such as compilers from Red Hat, and embedded operating systems from Wind River, to give developers programming flexibility along with rapid time-to-market.
The SR71000 toolkit includes a development board with Ethernet ports and logic analyser connection ports for convenient code development and debugging; a full set of compilation tools, including an optimising C complier from Red Hat optimised specifically for this CPU architecture; linkers, loaders and libraries; and a full set of documentation.
This toolkit is available now for qualified customers.
SandCraft's manufacturing partner is United Microelectronics Corporation (UMC), which manufactures the SandCraft SR71000 in a 0.15um state-of-the-art CMOS copper process with seven levels of metal interconnect.
The 800MHz speed grade part is being built on UMC's 0.13um process with eight layers of copper interconnect using the low K dielectric SiLK process, one of the highest performance processes in the industry.
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