System boasts high-bandwidth acquisition

The SMT391, the flagship of Sundance's new family of high performance data acquisition systems, is a powerful 1Gsample/s dual-channel analogue-to-digital convertor.

The SMT391, the flagship of Sundance's new family of high performance data acquisition systems, is a powerful 1Gsample/s dual-channel analogue-to-digital convertor (ADC).

This high-performance 8bit, DAQ system makes the SMT391 ideal for high-bandwidth applications such as high-speed test and instrumentation, satellite communications, software defined radio (SDR), direct RF/IF processing, direct RF down conversion and radar.

The SMT391, a "daughter module" that outputs data to a network of Sundance's reconfigurable computing and DSP systems, is managed by a Xilinx Virtex-II Pro FPGA.

The Virtex-II Pro FPGA, with its IBM PowerPC embedded processor capabilities, manages the data transfers to a variety of communication channels such as COM ports, Sundance High-speed Bus and Xilinx RocketIO multigigabit transceivers (MGTs).

These channels are compatible to a wide range of Sundance processors and I/O modules.

The FPGA controls all digital functions on the module as the digital output of the Atmel broadband convertor is fed into the FPGA.

These data are then stored in an onboard DDR SDRAM for non-real-time processing.

"The SMT391 leverages fully the power, performance and reconfigurability flexibility of the Xilinx Virtex-II Pro and meets the stringent requirements of wireless and signal processing applications", said Dr Nory Nakhaee CEO of Sundance.

"The combination of Sundance's signal processing technologies and high-speed broadband expertise combined with the power of the Virtex-II Pro, makes the SMT391 more than just a data acquisition module as it is also high-speed convertor, a processor and a gateway to an array of powerful processing nodes", concluded Nakhaee.

A highly compact twin board design makes up the SMT391.

A top layer board, the daughterboard, is coupled to a base module via a Sundance LVDS Bus.

This daughterboard contains all the analogue circuitry, the clock generation, trigger control, analogue signal conditioning and as well a convertor.

This device handles all data acquisition and conversions.

Analogue data enter the top module via two analogue data streams that are preconditioned before they enter the dual-channel ADC convertor.

In conjunction to the two analogue inputs, users can also provide the module with a custom clock and trigger.

"Sundance was one of the first to recognise the benefits our Virtex-II Pro can offer to high speed broadband applications", said Jerry Banks, Director of Worldwide DSP Solutions Marketing at Xilinx.

"The Sundance data acquisition system introduces a novel level of design, performance and flexibility that delivers the most advanced features engineers expect in a system oriented data acquisition module".

The base module is a reconfigurable computing system also powered by a Xilinx Virtex-II Pro FPGA.

The FPGA is centre to the base module as it controls all digital functions on the module.

By separating the analogue circuitry from the digital one, Sundance has not only substantially reduced crosstalk, but has also provided an astute heat-dissipation scheme for the bottom board components.

Configuring the main FPGA is done via onboard and in-system programmable logic that is configured through an onboard JT interface.

Configuration, sampling and transfer modes are set by configuration data received over the COM ports or the RocketIO serial links.

The SMT391 is truly a reconfigurable data acquisition system; the Atmel ADC digital outputs are fed into the FPGA where they can be processed by an optional user-designed intellectual property core.

The data are transferred to a 64Mbyte (per channel) DDR SDRAM.

When the SMT391 is embedded in a larger system environment, this data is disseminated to other system modules via a high-speed bus interface.

Alternately, the data stream may also be transmitted over to the FPGA serial link interface.

"One of the most challenging design issues we faced in developing our stand-alone systems was the implementation of a cost effective high-speed ADC", said Lan Tran of the Naval Research Laboratory, Information Technology Division.

"With Sundance's SMT391 high sampling rate, throughput and compatible DSP and FPGA systems we managed to meet our specification requirements and remained within our project budget constraints".

Designed for high-speed I and Q channel type applications, the SMT391 has two identical channels and all settings are applicable to both.

Operations for both channels are the same, and there is only one sample clock for both channels and both channels will respond to the same trigger.

The dual channel Atmel convertor converts the analogue data, and a single 16bit parallel datastream is generated for each channel.

One stream is transmitted as is over the RSL interface for real-time type applications.

The second datastream can either be transmitted straight over the SHB interface or stored in DDR SDRAM every time a trigger is received.

Pricing for the SMT391 starts at US $6550, evaluation units and volume pricing are also available.

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