Down-convertor core boasts twice the speed

The FC104 is a new and powerful digital down convertor (DDC) IP core specifically developed for Xilinx FPGAs.

Available now from Sundance Digital Processing, the FC104 is a new and powerful digital down convertor (DDC) IP core.

Specifically developed for Xilinx FPGAs, this fully configurable core combines flexibility and speed to address the demanding performance requirements of complex DSP applications such as software defined radio, wireless IP development, hardware testing, radar and electronic warfare applications.

Twice as fast as any DDC core on the market today, the FC104 can be fully implemented on Sundance's SMT398, SMT338, and SMT368 FPGA-based reconfigurable computing platforms.

This combination makes for a high performance, flexible and fully integrated programmable off-the-shelf digital receiver.

With its ultrahigh performance generated by its quad DDC architecture, the FC104 accepts 16bit complex data and can process data flows up to 1Gsample/s continuously.

"The year 2005 is going be an important year for the wireless industry and 3G wireless products".

"Communications OEMs are always seeking cost-effective, high-performance IP core and reconfigurable computing platforms to implement and test their new designs", said Flemming Christensen, Managing Director of Sundance.

To support its OEM customers in meeting this challenge, Sundance has leveraged its IP development, signal processing, and complex hardware development expertise to offer one stop shop solutions such as the FC104 and the SMT platforms.

Handcrafted and optimised by VHDL experts, the FC104 is particularly well suited for Xilinx' FPGA family of products such as Virtex II, Virtex-4 and SpartanT-3.

All four stages of this DDC are fully programmable and four 16bit complex samples can be loaded in parallel at a rate of 250MHz.

The DDC core is composed of four NCO and mixers in parallel and the output can be decimated by factors power of two.

The input gain is user programmable, and the numerically controlled oscillator (NCO) is composed of four sets of sine and cosine.

At the mixer stage the core implements four mixers in parallel and its output can be decimated over by factors.

The output stage is also user programmable.

"Increasing wireless infrastructure requirements are driving the proliferation of 3G wireless technologies", said Robert Bielby, Xilinx Senior Director of Vertical Marketing and Partnerships.

"We are pleased that our Xperts partner Sundance is enabling accelerated industry deployments by offering a fully verified digital down convertor IP core that leverages the integrated DSP blocks of our Virtex-4 device to deliver a high-performance, low-power solution".

The FC104 leverages Xilinx' Virtex-4 high speed dedicated arithmetic resources to reduce the number of inputs, NCO and mixer block.

The design reduces the number of resources needed by almost half and the performance of the core is sustained at 1Gsample/s.

The FC104 can also be customised for higher performances for customer specific design solutions.

Pricing for the FC104 can start at US $8000.

However, costs will depend on implementation specifics, such as the platform selected and the DDC parameters.

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