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Synthesisers keep clocks on track

A Semtech product story
Edited by the Electronicstalk editorial team Feb 18, 2003

The ACS8520 and ACS8522 are high-integration, single-chip circuits that provide an essential retiming of Stratum clocks in Sonet, SDH, or PDH WAN environments.

Semtech has added two new devices in its synchronous equipment timing source (SETS) line.

Building on its family of ground-breaking clock synthesis and line card protection switching devices, the ACS8520 and ACS8522 are high-integration, single-chip circuits that provide an essential retiming of Stratum clocks in Sonet, SDH, or PDH WAN environments.

The new devices are highly configurable, enabling designers to rapidly achieve synchronisation requirements for designs that implement Stratum 3/4E/4 clocks, Sonet minimum clocks (SMC), or Sonet/SDH equipment clocks (SEC).

The devices are suitable for a wide range of communications applications, including add-drop multiplexers, switches, cross-connects, routers, DSLAMs, retrofit upgrades, and other network elements.

The devices meet key industry standards including Telcordia GR-1244 and GR-253 for Stratum 3 clocks and Sonet minimum clocks.

For SDH equipment clocks, the devices meet ITU-T G.813 Option 1 and 2, and ETSI ETS 300 462 series standards.

Both devices exceed the Stratum 3 clock performance requirement when used with external 12.8MHz temperature compensated or oven controlled crystal oscillators (TCXO or OCXO).

The two devices are based on a mixed analogue and digital PLL architecture that incorporates Semtech's patented phase detector to enable direct phase locking.

This yields unprecedented synchronisation performance and minimises system bit-error rates.

Like prior Semtech SETS devices, the ACS8520 and ACS8522 both incorporate two independent PLL domains to further enhance synchronisation performance.

This dual-PLL approach also helps support generation of multiple, simultaneous clocks, each programmable to output one of 55 different clock rates, including standard n x E1, n x DS1, E3, DS3, and OC-n rates up to 155.52 or 311.08MHz.

Both devices allow output phase adjustment of +/-200ns in 6ps steps.

The ACS8520 accepts 14 individual reference clock inputs at varying rates, while offering 11 programmable clock outputs.

The ACS8522 includes four fully programmable TTL clock inputs and outputs.

Both devices provide independent frequency and activity monitors for each input, programmable soft and hard alarm thresholds for input failure, and programmable output pulse width and polarity with reference to another output.

Both devices also generate independent SEC and BITS clocks, and 8kHz frame synchronisation and 2kHz multiframe synchronisation clocks.

The ACS8522, which is intended for lower-complexity system synchronisation needs, offers a serial interface for configuration and monitoring.

The ACS8520, in addition to providing more clock inputs and outputs, also incorporates a standard 8bit microprocessor interface for programming.

This provides designers with the flexibility to develop a single sync card to fit multiple applications.

"Our highly adaptable single-chip SETS devices exceed the requirements of any optical networking system being deployed today", says Stewart Kelly, Director of Semtech's Advanced Communications Division.

"They revolutionise the way designers meet their system synchronisation needs.

The potent combination of our pioneering products and knowledgeable applications engineers has helped Semtech gain a reputation as the synchronisation experts".

Samples of the ACS8520 and ACS8522 are available from Semtech's authorised sales representatives and distributors.

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