Tools provide validation for complex SoC I/O
SiliconSmart IO is the industry's first commercial toolset designed to perform detailed characterisation, modelling and electrical specification compliance verification.
SiliconSmart IO is the industry's first commercial toolset designed to perform detailed characterisation, modelling and electrical specification compliance verification.
SiliconSmart IO provides a bridge between the digital world of the SoC core and the analogue world of the board.
Today, many companies expend substantial time and effort in the development and characterisation process of I/O cells, only to discover that they fail to meet electrical specification across all operating corners.
The failure of these time-critical components requires expensive redesign.
SiliconSmart IO is specifically designed to recover this lost time and more.
Combining automated electrical compliance validation, Spice-accurate characterisation, and vendor-certified model generation, SiliconSmart IO enables the accurate static timing and dependable power analysis required by design teams to close timing and power faster.
The compliance validation feature of SiliconSmart IO provides a comprehensive report across all operating corners detailing instances of noncompliance to electrical specifications.
SiliconSmart IO's advanced measurement acquisition technology accounts for the complex mixed-signal entities within I/O cells.
Various analogue characteristics and measurements such as state voltage, drive current, differential sensitivity, hysteresis, crossover voltage, and non-monotonic waveform detection are just a few of the parameters that are automatically verified.
These measurements are performed in realistic settings that take into account bond wire inductance, off-chip transmission line loads, and nonidealised supplies.
I/O designers need to address a variety of end-user environments to ensure that their design is compliant with published electrical specifications.
SiliconSmart IO's compliance verification encodes the interpretation of complex industry standards that govern the functional and electrical characteristics of most I/O circuits.
The embodiment of these standards into a commercial tool, such as SiliconSmart IO, coupled with the uniform application of the compliance criteria produces consistent results for I/O characterisation and specification compliance, regardless of the design or source of the I/O library.
Silicon Metrics' packaging of the compliance knowledge base into a standard tool relieves designers of repeated, tedious, error-prone, and often controversial interpretation of these complex standards documents.
SiliconSmart IO addresses this growing problem by enabling designers to automatically model, analyse and verify cells with a third-party verification tool.
"I/O characterisation and verification is a difficult task that carries severe penalties if not properly addressed", said Rob Aitken, ASIC Design Methodology Manager at Agilent Technologies.
"Until now, there has been a significant lack of automated commercial tools in the area of I/O characterisation, modelling, and analysis.
SiliconSmart IO's model generation and unique compliance validation technology help us ensure that I/Os created by our design teams will work in a wide variety of applications".
"The I/O is the design's communication path to the outside world, and many companies are surprised and alarmed to discover that their I/O cells fail to meet electrical specification across all operating conditions", said Callan Carpenter, president and CEO of Silicon Metrics.
"SiliconSmart IO simplifies the model generation and compliance validation process, a significant factor in helping design teams achieve their goal of better silicon, faster".
The SiliconSmart IO suite supports the characterisation and modelling of a wide variety of complex I/O.
The software is currently available on Solaris and HP-UX.
Linux platform support will be available in the second half of the year.
Electrical specification compliance validation is currently available for USB low speed, full speed and LVDS cells.
Support for SSTL and USB high speed will be available in Q4.
Other I/O specifications such as HSTL, I2C, I2S, PCI, PCI-X and AGP will be available in subsequent releases.
(This was Electronicstalk's Top Story on 6 August 2002).
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