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IP core suits varied ASIC systems

A Silicon Logic Engineering product story
Edited by the Electronicstalk editorial team Feb 28, 2008

SLE's Interlaken IP Core was built to work with off the shelf serdes from most technology vendors.

Silicon Logic Engineering (SLE) has released a 150Gbit/s high-speed Interlaken protocol IP core for use in ASIC designs.

The high-speed core delivers the performance and bandwidth that new designs require.

It is fully scalable and ideally suited for multiple generations of future network switches, routers and storage equipment.

The scalability is achieved through the combination of the serdes speed (3.125 to 6.375Gbit/s) and a variable number of serdes lanes (1 to 24).

Designed and tested to be easily synthesisable into any ASIC technology, SLE's Interlaken IP Core was built to work with off the shelf serdes from most technology vendors.

Using the vendor-specific serdes allows SLE customers to quickly integrate the Interlaken IP Core into the customer's technology of choice.

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