Product category:
Programmable Logic Devices
News Release from: Silicon Concepts | Subject: Lattice ispGDX2 family
Edited by the Electronicstalk Editorial
Team on 29 January 2003
Crosspoints provide programmable
interfaces
A new in-system programmable, 38Gbit/s crosspoint switch from Silicon Concepts offers a universal interface capability that supports advanced parallel and serial protocols cost-effectively.
A new in-system programmable, 38Gbit/s crosspoint switch from Silicon Concepts offers a universal interface capability that supports advanced parallel and serial protocols cost-effectively, allowing designers the flexibility and performance to implement exactly the required interface functionality with a minimum of compromise and expense The Lattice ispGDX2 family of digital crosspoint switches from Silicon Concepts is suitable for many applications including the implementation of switched backplanes, low-cost serial links, standard translation, bus multiplexing, and the consolidation of drivers, transceivers and serdes
This article was originally published on Electronicstalk on 10 Apr 2002 at 8.00am (UK)
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They offer high-speed bus switching and interfacing with a bandwidth of up to 38Gbit/s without serdes, 13.6Gbit/s with, assuming that half the I/Os are configured as inputs, half as outputs.
The devices provide the flexibility and time to market associated with programmability along with the benefits of JTAG testability to these applications.
The crosspoint switches feature from 64 to 256 programmable I/O pins with as many as 16 full-duplex 850Mbit/s serdes channels integrated into a programmable architecture.
Programmable sysI/O pins support a variety of advanced I/O standards at speeds of 300MHz or greater, while programmable sysClock phase-locked loops provide precise timing control.
A multiplexer based architecture and on-chip control logic facilitate the high performance implementation of common switching functions.
Silicon Concepts is offering ispGDX2 in 3.3, 2.5 or 1.8V core voltage versions.
In-system programming is implemented via an IEEE1149.1 interface that is compliant with the IEEE1532 standard.
Voltages required for the I/O buffers are independent of the core voltage supply, further enhancing the design flexibility of the family.
Typical applications for the ispGDX2 include multiport multiprocessor interfaces, serial backplanes, wide data and address bus multiplexing, programmable control signal routing and programmable bus interfaces.
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