Expanded programmability FPGA a reality

Edited by the Electronicstalk editorial team Apr 28, 2003

The Lattice ispXPGA 1200 now available from Silicon Concepts contains 1.2M system gates (15K logic elements), 414Kbit of Block RAM and 246Kbit of distributed RAM.

The Lattice ispXPGA 1200 now available from Silicon Concepts contains 1.2M system gates (15K logic elements), 414Kbit of Block RAM and 246Kbit of distributed RAM.

It supports 496 I/Os, including 20 sysHSI high-speed serial link pairs (serdes channels).

Lattice will offer the ispXPGA family with 125K gates to 1.2M gates or 2K to 15K logic elements.

Release 2.0 of the Lattice ispLever design software includes complete support for the ispXPGA and ispXPLD families.

Lattice's new ispXP (expanded programmability) technology combines the best features of EEPROM and SRAM technologies.

ispXP uses a combination of EEPROM nonvolatile cells and SRAM technology to deliver a single-chip solution supporting "instant-on" startup and infinite reconfigurability.

A nonvolatile EEPROM array distributed within an ispXP device stores the device configuration.

At power-up this information is transferred in a massively parallel fashion into SRAM bits that control the operation of the device.

In addition to the new ispXPGA family of FPGAs, Silicon Concepts is offering Lattice ispXP technology in the ispXPLD family of XPLDs.