Product category:
Design and Development Software
News Release from: Summit Design | Subject: Visual Elite ESC
Edited by the Electronicstalk Editorial
Team on 25 September 2003
SystemC-based development integrates ARM
models
Summit Design has extended its EDA partnership agreement with ARM and has licensed ARM cycle-callable models (CCMs) for distribution with Summit's Visual Elite ESC product.
Summit Design has extended its EDA partnership agreement with ARM and has licensed ARM cycle-callable models (CCMs) for distribution with Summit's Visual Elite ESC product Visual Elite ESC is a SystemC-based hardware/software, codesign and coverification environment with integrated instruction set simulator (ISS) models for target processors
This article was originally published on Electronicstalk on 18 Jun 2004 at 8.00am (UK)
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Summit Design has expanded its Visual ESC package with the latest cycle callable models (CCMs) for ARM processors, a new Amba AHB bus model and the ARM RealView debugger.
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Visual ESC's high-level design methodology, together with its tight link into the ARM CCMs, will offer developers a design strategy for faster development of complex next-generation products.
ARM CCMs are transaction-accurate simulation models of ARM processors, designed to be easily integrated with custom cycle-based simulators.
Each CCM contains a high-speed cycle-based behavioural model, an ARM debug interface and ARM memory interface.
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"This extension of our EDA Partnership agreement with Summit Design will provide developers of ARM Powered systems with a highly featured co-design flow to create and simulate their hardware and software design components in a co-design environment", said Noel Hurley, manager of EDA Alliances, ARM.
"Executable System models, enabled by ARM's cycle-callable models, will significantly enhance the hardware and software co-design process and reduce overall time-to-market".
Visual Elite ESC is a new generation ESL solution that enables the modelling and verification of system-level hardware with the system software, and provides architecture and performance modelling and analysis.
The visual virtual prototype allows users to create an executable model of the system, incorporating the embedded processor model.
This model provides the software development team with a development and testing platform before the hardware has been implemented.
This significantly reduces time to market by months.
"The agreement with ARM is a strategic milestone for us", said Rami Rachamim, Director of Marketing, Summit Design.
"ARM is the industry leader with their RISC technology, and is also one of the main driving forces for SystemC and ESL.
We are seeing an increasing demand for high-level modelling and performance analysis capabilities for ARM core-based platforms and we are providing those solutions leveraging ARM's cycle callable models".
Visual Elite ESC possesses the verification speed afforded by SystemC and transaction-level communication, while achieving highly accurate ISS performance.
It provides powerful debugging and tracing capabilities for both hardware and software, including assembly and source level debugging.
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