Comms processor combines RISC and DSP architecture

Spectre Communications is extending the horizons of its communications processor capability, with the introduction of hyNet32XS system-on-chip devices.

Spectre Communications is extending the horizons of its communications processor capability, with the introduction of hyNet32XS system-on-chip devices.

The company, which specialises in modular communications technologies for industrial, instrumentation and medical markets, is launching the products following last year's acquisition of hyNet manufacturer Hyperstone by Spectre's long-standing franchise CML Microsystems.

The new communications processor combines the highly efficient and easy to program Hyperstone RISC/DSP architecture with the key interfaces and features required for embedded networking and communications applications.

High integration, low power consumption and the device's price-performance point make it ideally suited to cost-sensitive designs such as embedded web servers, wireless LAN and Bluetooth access points, remote service applications, powerline communications, VoIP and residential gateways.

RISC and DSP performance is benchmarked at up to 220MIPS and 880MOPS, boosted by dynamic frequency scaling and latency based parallelism of RISC ALU, load/store and DSP functions.

The device's four internal buses enhance data throughput, with a multichannel DMA controller offering six independently configurable channels.

The peripheral bus operates with variable frequency to reduce power consumption, and is complemented by a multimaster/multislave high frequency system bus, Ethernet and coprocessor buses.

Power-saving features such as clock scaling, multiple power saving modes and efficient implementation on silicon guarantee a highly energy-efficient chip, consuming less than 1700mW at 220MHz (worst case).

The chip's versatile interface options include an Ethernet PHY, dual 10/100Mbit/s Ethernet MACs with media independent interfaces, an MII scanner and IEEE1588 block for real-time networked operation.

There is a USB 1.1 device controller supporting up to 12Mbit/s serial data transmission, an IOM-2 bus interface, and a Controller Area Network (CAN) interface.

In addition, the chip's ATM-Utopia Level-2 Interface, allows connection of up to three external ATM physical layer controller (PHYs), and there is a multiplexed processor interface (MPI) configurable for CPU independent external transfers.

The MPI is accessible directly by the CPU or a DMA, which connects up to 15 external power line physical layer controllers for TDM transmission.

The integral communication engine provides 16 I/O lines or software-controlled general purpose I/Os, providing eight communication channels and commands including UART, IrDA, I2C master and slave, synchronous communication and interface options to devices such as A/D or D/A convertors, codecs and serial memories.

Time to revenue is accelerated through easy programming of RISC and DSP applications, complemented by a full set of integrated development tools available from Spectre including inexpensive starter-kit options, real-time kernel, DSP software library, macro assembler, C-compiler, debugger, file linker, library manager and profiler.

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