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Compact core is speedy 6bit ADC for SoCs

A Snowbush Microelectronics product story
Edited by the Electronicstalk editorial team Aug 23, 2007

Silicon proven 6bit, 2.5Gsample/s ADC IP core has high-bandwidth sample-and-hold front end, maintaining excellent dynamic performance throughout the full range of input frequencies.

Snowbush Microelectronics has developed a silicon proven 6bit, 2.5Gsample/s ADC IP core for the most demanding data-conversion applications.

The convertor core is compact and low in power consumption, and by using its high-bandwidth sample-and-hold front end, it maintains excellent dynamic performance throughout the full range of input frequencies.

The ADC features INL of 0.59LSB, DNL of 0.51LSB, and ENOB of 5.2 or greater for sampling clock frequencies up to 2.5GHz.

The ADC occupies a silicon area of 0.43 square millimetres.

"This ADC will enable product developers to reduce system costs by including the high performance convertor they need in their next ASIC instead of using a more power hungry external component", says Snowbush Vice President of Sales and Marketing, Paul Layman.

"It is ideally suited for a variety of applications that require excellent matching between multiple ADCs, such as I-Q radios, and it doesn't require any expensive analogue process options".

The state-of-the-art ADC uses automatic calibration of key analogue blocks to ensure performance over variations in process, voltage and temperature.

The ADC features on-chip power-supply regulation for robust noise immunity within large digital SoCs.

Several power-down modes are provided to minimise power consumption.

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