Product category:
Memory Devices and Modules
News Release from: Silicon Storage Technology | Subject: MPF+
Edited by the Electronicstalk Editorial
Team on 27 May 2003
Further functions for high-density NOR
Flash
Expanding on the success of its current Multi-Purpose Flash product family, SST's MPF+ products include four major new features critical for mobile phones and set-top boxes.
Expanding on the success of its current Multi-Purpose Flash (MPF) product family, SST's MPF+ products include four major new features critical for mobile phones and set-top boxes, as well as cable and DSL modems, high-end MP3 players, industrial equipment and other networking products Developed using the company's 0.18-micron self-aligned SuperFlash technology, the new MPF+ family includes densities of 16, 32 and 64Mbit
This article was originally published on Electronicstalk on 11 Dec 2007 at 8.00am (UK)
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Performance boost for Flash memories
Flash memories feature fast effective read and program performance, which gives systems using the devices fast boot and field update times.
16 Mbit low voltage, low density flash
SST (Silicon Storage Technology), has rolled out its 1.8V low-density flash product portfolio with the announcement of a 16 Mbit Multi-Purpose Flash Plus (MPF+) device.
The four enhanced features of the new MPF+ family are erase-suspend/erase-resume, boot block write protection, security ID and hardware reset.
The erase-suspend/erase-resume feature allows an erase operation to be suspended so that other more time-critical operations can be performed before the erase operation is resumed.
For example, this feature supports the 4ms interrupt-servicing requirement of GSM mobile phones.
Further reading
Big Flash chips offer speedy erasure
Silicon Storage Technology has entered production with the first of its 64Mbit Multi-Purpose Flash Plus (MPF+) product family.
Low-voltage serial Flash extends to 4Mbit
Small-form-factor device is ideal for battery-powered space- and height-constrained mobile applications where performance, reliability and low power consumption are crucial.
8051-based MCU has dual-bus structure
Dual hardware SMbus interfaces let the SST89C58RC act as an intermediary between a host processor and a complex multichip A/V subsystem.
The boot block write protection feature allows the boot block area of the Flash to be protected by a write-protect pin, giving the most important portion of the code an added level of protection from attacks by hackers and viruses.
The security ID feature offers two 128bit one-time-programmable registers.
One register is programmed by SST to provide a random and unique identification number, whereas the second is programmed by the customer for any purpose.
The hardware reset feature enables system designers to easily reset the entire Flash device along with other system devices.
Based on SST's novel 0.18-micron, self-aligned SuperFlash technology, the MPF+ family delivers high performance, superior reliability, low-power operation and small sector size.
With chip erase operations 1000 times faster than conventional Flash, SST's customers can erase their Flash devices during manufacturing in 40ms instead of the 1min or more typical with most Flash alternatives, saving customers both time and money and removing bottlenecks in manufacturing.
As for in-system programming, individual sectors can be erased 50 to 100 times faster than conventional Flash, thereby reducing power consumption and providing a better end-user experience.
The smaller sector size of MPF+ devices allows system designers to easily partition the code and data into small, uniform 2Kword segments - 16 times smaller than competitors - resulting in more efficient firmware design, better system performance, reduced power usage and even lower cost when the firmware size can be compacted to a smaller memory density.
In addition, MPF+ products come in the industry's smallest standard packages.
The 16 and 32Mbit devices are offered in 6 x 8mm TFBGA packages, which are smaller than any other standard 16Mbit packages available in the Flash industry.
The MPF+ family products will also be offered in very small ComboMemory packages that combine the MPF+ Flash die with SRAM.
"The MPF+ product family offers the perfect balance of features, performance and package size for the mobile phone and set-top box markets", said Bing Yeh, CEO of SST.
"With densities spanning from 16 to 64Mbit, the MPF+ devices will further SST's penetration into the higher density Flash memory market where our SuperFlash technology will again demonstrate a distinctive level of performance, scalability, reliability and low-power consumption".
SST is currently sampling the 32Mbit members of the MPF+ product family with production starting in 3Q 2003.
The 32Mbit devices include the SST39VF3201 (bottom boot block device) and the SST39VF3202 (top boot block device).
The 16 and 64Mbit versions are expected to be available in the second half of 2003.
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