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Communications ICs (Wired)
News Release from: STMicroelectronics | Subject: 65nm NOR Flash memory process for multimedia apps
Edited by the Electronicstalk Editorial
Team on 16 February 2007
NOR Flash memory on 65nm process
STMicroelectronics has announced the availability of the 65nm PR family of NOR Flash memory.
STMicroelectronics has announced the availability of the 65nm PR family of NOR Flash memory Based on fourth-generation multi-level-cell (MLC) technology, the 65nm PR family is fully hardware and software compatible with the existing 90nm NOR Flash PR family, providing an easy migration path for customers, while offering increased memory density and improved performance
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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Meeting the demand of high-resolution cameras, multimedia content, and fast internet connectivity in mobile applications, the 65nm PR family from ST offers up to 133MHz in burst read speed, program throughput of 1.0Mbyte/s, and deep power down mode with 1.8V power operation.
This advanced NOR Flash family is offered in combinations with LPSDRAM, LPDDR-SDRAM, PSRAM, and NAND devices supporting shared-bus and split-bus configuration in Multi-Chip Packages (MCP) and Package-on-Package (PoP) solutions.
"By reaching the 65nm process lithography, STMicroelectronics offers a competitive solution, giving OEMs an option when designing in high density NOR Flash solutions", says Geoff MacGillivray, Lead Memory Analyst for Semiconductor Insights.
"Comparing with the main competitor, the ST 1Gbit MLC NOR Flash, with a die size of 50.8 square mm, has the smallest die size on the market, resulting in the highest Mbit/mm squared rating at 20.16Mbit/mm squared".
"Equally impressive is the small cell size, measuring only 0.042um squared".
"One gigabit of monolithic memory, implemented in 65nm multi-level cell technology, allows advanced system performance and an enhanced experience for end users", says Marco Dallabora, Vice President and General Manager, Wireless NOR Flash Division.
"Together with the 512Mbit 65nm NOR Flash devices, it offers easy migration from ST's 90nm PR family, which is already implanted in proven high-performance platforms".
The 65nm PR family is part of the collaboration that STMicroelectronics and Intel announced in December 2005.
This ongoing co-operation provides customers with the latest high performance products, with the flexibility of multiple sources.
Samples are available now and volume production starts in first half of 2007.
Budgetary pricing for the 256Mbit, 512Mbit and 1Gbit devices in stacked packages with PSRAM, LPSDRAM, and NAND devices is forecasted between US$10 and US$30.
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