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News Release from: STMicroelectronics
Edited by the Electronicstalk Editorial
Team on 21 January 2008
Wafer share scheme brings 45nm to
academia
The 45nm CMOS process builds on the successful collaboration that has allowed universities to access previous CMOS technology generations such as 65 and 90nm.
The CMOS 45nm process from STMicroelectronics is now available for prototyping to universities, research labs and companies through the silicon brokerage services provided by CMP (Circuits Multi Projects) The announcement was made during the annual CMP users meeting held in Paris, which is an open event for representatives from academia, research institutes or private enterprises that use or are interested in using the CMP multiproject wafer services that allow organisations to obtain small quantities of advanced ICs, typically from a few tens to a few thousand units
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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The introduction of the 45nm CMOS process builds on the successful collaboration that has allowed universities to access previous CMOS technology generations such as 65 and 90nm.
For example, more than 100 universities (60% in Europe, 40% in Americas and Asia) have now received design rules and design kits for ST's 65nm bulk CMOS process.
During the CMP annual meeting, ST and CMP also announced that ST's CMOS 65nm on SOI process has been added to CMP's technology portfolio for academia.
Devices designed on the SOI substrate exhibit substantially higher performance and/or lower power consumption than identical designs on the bulk substrate.
In addition, SOI technology is more robust to radiation, which makes it more suitable for space applications, for example.
According to Bernard Courtois, Director of CMP, there has been a sharp growth in the number of CMOS devices produced in recent years.
For example, in 2007 the total number of circuits designed in 90nm CMOS increased by almost 100%, with 91 circuits designed in 2007 compared with 57 in 2006 and 32 in 2005, and most of the top universities are now preparing designs in 65nm.
"This is a very exciting programme, which perfectly illustrates our strong involvement with the education and research communities".
"It is essential that university students and researchers can have access to the most advanced technologies, which we have been providing in co-operation with CMP for two decades", said Patrick Cogez, Director, Universities and External Relations, Front-End Technology and Manufacturing at STMicroelectronics.
"Ensuring that universities have access to our leading-edge technologies also helps us to attract the best young engineers as part of our commitment to remain a technology leader on a long-term basis".
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