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News Release from: Synplicity | Subject: Total Optimization Physical Synthesis
Edited by the Electronicstalk Editorial
Team on 15 June 2001
TOPS: synthesis flow fully automated
Synplicity has highlighted details of a second-generation physical synthesis technology for programmable logic designers, the first such technology in the industry
Continuing its development of innovative physical synthesis technologies, Synplicity has highlighted details of a second-generation physical synthesis technology for programmable logic designers, the first such technology in the industry Termed total optimisation physical synthesis (TOPS), this new technology achieves two fundamental milestones in physical synthesis: the full automation of the physical synthesis flow and the ability to perform precise physical placement of logic
This article was originally published on Electronicstalk on 16 Apr 2008 at 8.00am (UK)
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Physical synthesis is defined as the ability to perform simultaneous placement and logic optimisations based upon physical design information.
Building upon expertise gained from Synplicity's first-generation physical synthesis solution, the new technology is the result of nearly ten man-years of engineering effort focused on the development of unique algorithms, including new physical optimisations for improved performance in complex programmable logic designs.
Synplicity also announced it has successfully used the new technology to automatically improve performance in Xilinx Virtex designs by as much as 15 percent.
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By combining the fully automatic phase with an interactive phase, Synplicity has found that the new TOPS technology can improve design performance by as much as 50 percent compared with logic synthesis alone.
"Our first step in solving the physical synthesis challenge was to successfully develop an interactive physical synthesis methodology that enabled simultaneous placement and optimisation within regions, which we did with our Amplify Physical Optimiser software", said Andy Haines, vice president of marketing at Synplicity.
"With our second-generation TOPS technology, we believe we have overcome the barrier to total physical optimisation by incrementally performing detailed placement and optimisation of critical paths.
Based on this new capability, we have fully automated the physical synthesis process with significant new algorithmic developments to help deliver exact placement and better device performance than previously possible.
This technology is ideal for any timing-sensitive design and will enable users to continue to meet stringent design schedules as the complexity and size of FPGAs continue to escalate".
Synplicity introduced the industry's first physical synthesis tool for programmable logic devices (PLDs), the Amplify Physical Optimiser, in March 2000 and currently has more than 100 users worldwide.
Today's Amplify software enables designers to specify region-based physical constraints after HDL source code compilation, but before mapping, where maximum hardware performance may be achieved.
By using device-specific routing architecture and regional placement information about the design, the Amplify Physical Optimiser is able to optimise performance more aggressively, allowing designers to achieve timing goals much more quickly than is possible with traditional methods - logic synthesis and simple back annotation of delay.
Frequently, further productivity gains can be made because performance improvements can be achieved while using quick, non-timing-driven placement and routing.
"Our customers have been able to gain better control and performance in their designs by using the Amplify Physical Optimiser software for FPGA physical synthesis", said Rich Sevcik, senior vice president of intellectual property cores, service and software, Xilinx, "With this second-generation physical synthesis technology, our customers will be able to obtain even better results by taking advantage of the technology's automated methodology.
This is a huge productivity leap for FPGA designers".
Like Synplicity's first-generation physical synthesis technology, the TOPS technology performs simultaneous placement and optimisation.
However, the TOPS technology takes Synplicity's interactive physical synthesis approach to the next level by operating with exact placement information while optimising and incrementally placing the design, thereby improving performance.
The TOPS technology fully automates the physical synthesis process to help designers achieve higher device performance with the push of a button.
Using this methodology, designers do not need to be familiar with the physical architecture of a specific device to improve performance with physical synthesis.
Additionally, the automated and interactive phases may be used together to achieve maximum performance.
The TOPS technology features a new set of innovative physical synthesis algorithms, enabling designers to reach high-performance timing goals much sooner than previously possible.
These algorithms improve performance by using physical information and highly accurate timing estimations to perform new optimisations on critical portions of the circuit and generate detailed placement to be passed on to the place and route tool.
The ability to perform precise timing analysis is achieved through another set of algorithms featured in the TOPS technology.
These algorithms use detailed placement of the design, among other things, to optimise performance more aggressively than would be possible without highly accurate timing.
(Updated by CR, May 2007).
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