Product category:
Design and Development Software
News Release from: Synplicity | Subject: Amplify
Edited by the Electronicstalk Editorial
Team on 02 November 2001
Logic placement speeds synthesis an
extra 10%
Synplicity has enhanced its FPGA/PLD synthesis and physical synthesis software with new productivity and performance-improving features designed to enable higher quality of results.
Synplicity has enhanced its FPGA/PLD synthesis and physical synthesis software with new productivity and performance-improving features designed to enable higher quality of results Synplicity's Amplify physical optimiser software now features Synplicity's Total Optimisation Physical Synthesis (TOPST) technology
This article was originally published on Electronicstalk on 13 Jul 2005 at 8.00am (UK)
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New versions of Amplify RapidChip and Amplify RapidChip Pro software deliver higher quality of results and enable users to perform fast timing closure for their RapidChip devices.
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An enhanced version of the Amplify physical synthesis software suite features additional customisations for NEC Electronics' ISSP structured ASIC devices.
The industry's only physical synthesis solution for programmable logic devices (PLDs), the Amplify physical optimiser software provides designers with a high-performance interactive flow featuring simultaneous placement and logic optimisation.
Additionally, Synplicity announced it has enhanced its Synplify Pro software to include register retiming for Altera devices and a new, more powerful timing analysis engine.
"Synplicity is committed to delivering best-in-class solutions for programmable logic designers and strives to provide innovative products that deliver tangible results", said Andy Haines, vice president of marketing at Synplicity.
Further reading
Physical synthesis speeds structured ASIC design
Amplify AccelArray Pro software is a physical synthesis solution uniquely optimised for Fujitsu AccelArray structured ASIC devices.
Software qualifies for Fujitsu platform ASICs
The newest member of the Synplicity Amplify family of structured/platform ASIC products, Amplify AccelArray Pro, has received full qualification from Fujitsu.
FPGA synthesis software comes up to date
Synplicity has released new versions of its FPGA synthesis and physical synthesis software solutions.
"We believe our second-generation physical synthesis technology, TOPS, and our new Synplify Pro software are perfect examples of our ability to meet market demands.
Using the Amplify physical optimiser software with the TOPS technology, we expect customers to see up to 50% performance improvement over logic synthesis alone".
Synplicity introduced the industry's first physical synthesis tool for programmable logic devices, the Amplify physical optimiser software, in March 2000.
Currently, more than 100 customers worldwide employ the Amplify physical optimiser software for timing critical designs, thereby achieving up to a 40% performance improvement compared to using logic synthesis alone.
With the new TOPS technology incorporated into the Amplify software, designers can expect an additional 10% performance boost.
The TOPS technology is based on significant new algorithmic developments that produce precise physical placement while performing physical optimisation of logic on critical paths.
By performing detailed placement of logic, the TOPS technology is able to achieve even more predictable timing estimations, thus reducing the number of iterations required to close on timing.
Rich Sevcik, senior vice president and general manager, Xilinx, said, "As the only company providing a physical synthesis solution for programmable logic designers today, Synplicity is extending technology limits to deliver the ultimate performance for our leading-edge FPGAs.
We recommend Synplicity's Amplify physical optimiser software to our customers who need to obtain the highest performance possible".
The Amplify software includes additional productivity-enhancing features to help designers achieve the highest quality of results from their programmable logic device.
New BlockRAM support enables the software to view and assign logic to BlockRAMs.
Further improving the design process, the Amplify software performs automatic design rule checks (DRC) to ensure BlockRAM capacity is not exceeded before moving on to place and route.
Other new features in the Amplify software include floating region support for Altera APEX devices, an automated pin assignment user interface and new device support for Altera's APEX II and Mercury devices, and the Xilinx Virtex II devices.
The Synplify 7.0 and Synplify Pro 7.0 synthesis solutions are available now.
Current customers on maintenance will be upgraded at no additional cost.
The Amplify physical optimiser product with TOPS technology is available now as an option to Synplicity's Synplify Pro logic synthesis software.
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