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Amphion turns to Synplicity for IP development

Edited by the Electronicstalk editorial team Dec 21, 2001

Amphion Semiconductor has chosen Synplicity's Synplify Pro software as its tool of choice to develop intellectual property (IP) cores for FPGA applications.

Amphion Semiconductor has chosen Synplicity's Synplify Pro software as its tool of choice to develop intellectual property (IP) cores for FPGA applications.

The two companies will co-operate to define and produce an optimised design flow to support customers using Amphion's application-specific cores for FPGAs.

Amphion has also enrolled in Synplicity's Strategic Access Programme as a preferred IP partner.

"At a time when the programmable logic design community is increasingly turning to hardware accelerator IP in order to meet system performance requirements, it is vital that the design flow be optimised to provide the best quality of results", commented Steve Farson, vice president of engineering at Amphion.

"We have been impressed with the quality of results we've received using Synplicity's Synplify Pro software.

Inserting this software into our development process will help strengthen Amphion's delivery of the world-class cores our customers depend on".

Andy Haines, vice president of marketing at Synplicity, added, "More and more, our customers are using IP cores to take advantage of the high-density FPGA devices that have been emerging over the past few years.

We are pleased that Amphion has chosen our Synplify Pro product for its IP development.

This new partnership is consistent with our strategy to provide synthesis technology at both the development and implementation stages of IP use.

We believe the combination of our two technologies will enable our mutual customers to achieve high-performance results for their FPGA designs".

Under terms of this joint marketing and development agreement, Amphion will provide its customers with Synplicity Synthesis Constraints for soft (RTL) IP cores and static timing models in Synplicity's TCL format for firm (gate-level) IP cores.

Using these optimised constraints and timing models with the Synplify Pro software, customers should be able to quickly and easily implement Amphion cores into FPGAs from leading vendors.