Product category:
Design and Development Software
News Release from: Synplicity | Subject: Certify 6.0
Edited by the Electronicstalk Editorial
Team on 11 March 2002
Standard board support simplifies
prototyping
Synplicity has enhanced its Certify verification synthesis software to offer support for off-the-shelf commercially available prototype boards.
Synplicity has enhanced its Certify verification synthesis software to offer support for off-the-shelf commercially available prototype boards And, to deliver a so-called pushbutton prototyping flow, the company has also enhanced the Certify software's quick partitioning technology (QPT) and automated the Certify pin-multiplier (CPM) feature, enabling, for the first time, an automated design flow for prototyping with off-the-shelf multi-FPGA boards
This article was originally published on Electronicstalk on 16 Apr 2008 at 8.00am (UK)
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Using the new version of the software with an off-the-shelf prototyping board, Synplicity believes designers can develop a functional ASIC prototype in hours rather than days or weeks.
"There is little question that prototypes offer myriad benefits for verifying complex ASIC designs, yet many engineers see prototype development as a complex and tedious task", said Andy Haines, vice president of marketing for Synplicity.
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"By automating time-consuming tasks and offering customers easy access to many standard off-the-shelf hardware solutions, we've taken the unnecessary complexity out of ASIC prototyping to enable verification in the early stages of design.
Using this product, we believe engineers who are not experts in prototyping or who are not familiar with the design that is being prototyped, will be able to quickly build a prototype for verifying an ASIC with very little effort".
Rich Sevcik, senior vice president of FPGA products at Xilinx, said: "For more than two years, Synplicity's Certify product has provided our customers with best-in-class prototyping and debug technology.
Now, with its enhanced quick partitioning technology and Certify pin-multiplier support, only Synplicity offers designers an automated flow for prototyping an ASIC design using an off-the-shelf FPGA board.
We believe this innovative solution will open FPGA-based prototyping to a broader range of designers seeking solutions for their verification problems".
Now available for off-the-shelf boards, Synplicity's quick partitioning technology automates one of the most time-consuming processes in prototyping.
First introduced in version 5.0 of the Certify software, Synplicity has enhanced QPT to understand board trace connections as well as FPGA area and I/Os.
With these enhancements, the software can automatically divide a design according to predefined board specifications, eliminating board development costs and reducing time to market, making it easy to obtain the benefits of prototyping.
The Certify pin-multiplier feature allows a designer to use one I/O pin to transmit multiple signals between devices in order to conserve pins.
Despite the increasing number of pins available per FPGA device, most ASIC designs are difficult to partition because the I/O interconnect between modules can run in the thousands, preventing the design from fitting into even the largest FPGAs.
Using the newly automated CPM feature, a designer can successfully multiplex the I/O resources with little knowledge of the target FPGA architecture - simply compile the design and run QPT.
If a design cannot fit the target device, the designer can use the Certify software to try a larger board or select an I/O multiplexing ratio and automatically insert all the necessary logic and connections to map the design to the target device.
Incorporating RTL functional prototyping into the ASIC design flow offers designers substantial time to market advantages and enables early system software debugging.
The availability of predefined, interoperable solutions reduces the risk of incorporating this FPGA-based prototyping methodology into an existing design flow.
Synplicity established the Partners in Prototyping (PIP) programme in 2000 to identify and qualify a design methodology between the Certify software and complementary hardware, software and design services used in RTL functional prototyping.
Synplicity has now updated its Partners in Prototyping program to deliver information, links to standard board providers, and software files for standard, off-the-shelf boards both within the Certify tool and through the PIP website.
In fact, the new Certify software includes an enhanced board wizard that enables Certify designers to link to Synplicity's website directly from the software for additional help and information.
New Partners in Prototyping include: The Dini Group, Gidel, Hardi Electronics and Nallatech.
Documentation, technical information and software files are available on Synplicity's PIP website, allowing ASIC designers to visit a single destination for their prototyping needs.
Designers can also use the site to quickly evaluate whether a standard board exists to meet their specific design requirements by downloading board descriptions (.vb files) from the site.
The Certify 6.0 software will be available in March 2002 for Windows NT, Windows 2000 and Unix (Solaris and HP) operating systems.
Current Certify customers on maintenance will be upgraded at no additional cost.
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