Improved physical optimisation aids PLD design

Synplicity has enhanced its Amplify Physical Optimiser software, the industry's only physical synthesis solution for PLD designers.

Synplicity has enhanced its Amplify Physical Optimiser software, the industry's only physical synthesis solution for PLD designers.

The company has fully automated the Amplify physical synthesis flow, which can dramatically improve designer productivity and deliver performance improvements by up to 20% over logic synthesis alone.

The automated flow initially supports the Xilinx Virtex, Virtex-E and Virtex-II devices, and Synplicity intends to support the Altera Stratix device family in a future release of the software.

The enhanced Amplify software also offers support for Altera's APEX devices and Excalibur embedded processor solutions as well as the new Virtex-II Pro devices from Xilinx.

"As the capabilities of programmable logic devices grow to include complex I/Os and embedded processors, an integrated design flow that takes physical effects into account early in the cycle is critical to design success", said Andy Haines, vice president of marketing at Synplicity.

"Over the past two years, we believe the Amplify software has improved performance for customer designs by an average of more than 20%.

By automating the physical synthesis flow, we expect many more designers will now be able to take advantage of the Amplify product to quickly meet timing goals and save money through the use of lower speed grade components".

Using the automated flow to perform simultaneous placement and optimisation, Synplicity believes designers can obtain a performance boost of up to 20% over traditional synthesis.

The automated flow uses actual placement and routing delay information obtained during an initial place and route run to perform additional logic optimisations and incremental placement, reducing iterations between synthesis and place and route.

The automated design flow initially supports designers using the Virtex, Virtex-E and Virtex-II devices from Xilinx.

If additional performance improvement is needed, designers may then employ the Amplify software's interactive design flow to boost performance further.

The interactive flow has also been enhanced to include new detailed placement technology and additional physical optimisations, providing designers with more accurate timing estimations, further reducing design iterations.

Together, the Amplify software's automatic and interactive design flows can deliver performance improvements up to 45% higher than logic synthesis alone.

"Synplicity's Amplify software has consistently provided our customers with a synthesis solution that enables them to reach aggressive performance goals", said Rich Sevcik, senior vice president of FPGA products at Xilinx, Inc.

"Now with an automated flow, developed first for Xilinx, designers can achieve and surpass these milestones even faster, taking full advantage of the time to market benefits offered by our FPGA products.

We continue to recommend Synplicity's Amplify software to our customers who need to obtain the highest possible performance for their designs".

The new version of the Amplify software features additional enhancements to its interactive flow, including logic-array-block (LAB)-level support for Altera's APEX devices, which provides designers with the ability to constrain logic to individual LABs.

This support offers designers more control of logic placement and more importantly, a new set of physical optimisations to boost performance.

Synplicity's physical synthesis solution has also been optimised with custom mappers to support Altera's Excalibur embedded processor solutions for system on a programmable chip (SoPC) designs.

Tim Southgate, vice president of software and tools marketing at Altera Corporation, said, "Synplicity continues to be an important partner for Altera and our customers.

We have worked closely with Synplicity to ensure our software tools deliver a high level of performance and productivity for customers designing advanced programmable logic devices, such as our new Stratix device family.

Additionally, we believe the new enhancements in the Amplify product for our APEX devices and industry-leading Excalibur embedded processor solutions will allow designers to quickly maximise the performance of these complex architectures".

Driven by the proprietary Behavior Extracting Synthesis Technology (BEST) algorithms, Synplicity's Amplify Physical Optimiser software can synthesise even the largest programmable devices quickly and efficiently.

The software also uses Synplicity's Total Optimisation Physical Synthesis (TOPS) technology to perform simultaneous placement and logic optimisation enabling designers to achieve maximum performance from their high-density programmable logic devices (PLDs).

The automated Amplify Physical Optimiser software with TOPS technology is available now as an option to Synplicity's Synplify Pro logic synthesis software.

Current customers on maintenance will be upgraded at no additional cost.

The Amplify solution is now also available for Windows XP and Linux (RedHat 7.2) operating systems.

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