SoC tape-out success for Canon

Canon has successfully used Synplicity's Synplify ASIC synthesis software to tape out a complex system-on-chip design.

Canon has successfully used Synplicity's Synplify ASIC synthesis software to tape out a complex system-on-chip design.

Canon has received confirmation of tape out success from its ASIC partner, Fujitsu, for a two-million-gate, 0.18-micron image processing design.

Using the high-productivity Synplify ASIC software, Canon was able to quickly achieve better timing and area results without extensive RTL recoding, resulting in reduced power consumption, cost and turnaround time.

"For years we had few choices in logic synthesis tools.

In June 2001 we started evaluating the Synplify ASIC software and immediately obtained remarkable results", said Makoto Shimokoriyama, assistant general manager, Image Communication Technology Development Div, Research and Development Centre and Product Operations, Canon, "Traditionally, incorporating a new synthesis tool into an existing flow requires a large commitment of resources, however early in the adoption phase we easily added the Synplify ASIC solution into our existing tool chain.

The software allowed us to achieve phenomenal results for design projects where many issues had been unsolved by other synthesis products.

The Synplify ASIC software enabled us to achieve all of our challenging goals for timing, area and power ahead of schedule and without changes to the RTL code".

Canon's design team worked with Synplicity KK, Synplicity's local customer support team in Japan, and Fujitsu to easily integrate the synthesis software into its existing design flow.

Shimokoriyama added, "We are pleased to have established the technical cooperation in which Fujitsu and Synplicity contribute to Canon's success.

We are looking forward to keeping this relationship to launch market-winning products".

"We are very happy Canon was successful in obtaining higher performance from its image processing ASIC", said Yoji Hino, vice general manager, ASIC and System LSI Technology Div, Fujitsu Limited.

"We found that the netlist generated by the Synplify ASIC software passed cleanly through our layout flow.

We support the Synplify ASIC software's libraries and believe the software will provide our customers with a solution for meeting their design requirements.

We look forward to continuing our relationship with Synplicity".

Andy Haines, vice president of marketing at Synplicity, said, "We are committed to the success of our customers and believe Canon's tape out with Fujitsu validates our productivity-focused approach to ASIC synthesis.

By integrating the Synplify ASIC software into a design flow, we believe designers can obtain the high quality of results they require, with the speed and ease of use traditionally associated with Synplicity's solutions".

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