Rapid adoption for ASIC synthesis technology

Synplicity has reported rapid adoption of its ASIC synthesis technology, including a doubling of ASIC synthesis licence revenues during 2003.

Synplicity has reported rapid adoption of its ASIC synthesis technology, including a doubling of ASIC synthesis licence revenues during 2003.

Since Synplicity's entrance into the ASIC synthesis market in June 2001, 70 companies have purchased its Synplify ASIC and Amplify ASIC software, and 12 ASIC vendors have endorsed the software.

Synplicity attributes the success of its ASIC synthesis software to the tool's industry-leading and runtime feature-rich functionality, plug-and-play compatibility with current ASIC flows and its focus on ASIC vendors and the design handoff market.

The Synplify ASIC software leverages Synplicity's proven synthesis technology and delivers high quality of results up to 15 times faster than traditional synthesis tools.

The software's memory efficiency enables designers to perform timing-driven synthesis on multi-million-gate designs in a single operation using Synplicity's MultiPoint automated hierarchical synthesis technology.

This unique approach to ASIC synthesis enables Synplicity to win head-to-head engagements against other synthesis tools when customers compare area, runtime and timing performance.

"The Synplify ASIC software was selected as one of the ASIC synthesis tools at Raytheon Missile Systems because of its speed (10x speed improvement or better in some applications), ease of use and accuracy", said Dave Richardson, Raytheon Missile Systems.

"This tool enhances the engineer's ability to perform the rigorous functions required by today's standards".

The Synplify ASIC software typically meets user timing goals with up to 30% fewer gates than other tools.

Several high-volume designs have taped out using the Synplify ASIC software, including products from digital camera, digital video, disk drive and computer peripheral equipment vendors.

"We selected the Synplify ASIC software for many reasons, but most importantly, the software achieves great quality of results and very fast runtimes simultaneously", said Masao Kuribayashi, General Manager, SOC technology department, R and D Division, Corporate R and D Center, Olympus Corp.

"We were not surprised to find one of our key IP suppliers also using the Synplify ASIC software to achieve notable performance and area results.

We plan to use the Synplify ASIC software on upcoming Olympus product developments".

"Synplify ASIC from Synplicity has been used in our current flow.

What we have gained from Synplify ASIC are smaller area and less routing congestion, which makes the netlist more layout friendly.

We are also very pleased with the run time advantage, which is a 60% improvement", said Tom Chun, ASIC Design Manager at Adaptec Corp.

Ralph Haines, VP Engineering of QuickSilver Technology said: "Our Adaptive Computing Machine (ACM) is primarily used in handheld, mobile and wireless products that require small area ICs with high performance and low power consumption.

We chose the Synplify ASIC synthesis tool because it offers the best area reduction as compared to other tools, thus strengthening our competitive advantage.

We have recently received our first prototype samples using Synplify ASIC and are happy to report first pass success".

Additionally, GlobespanVirata, a leading supplier of silicon and software for broadband communications, has leveraged the speed of the Synplify ASIC tool to deliver a right-on-time SoC tapeout.

The Synplify ASIC and Amplify ASIC products both are indicative of Synplicity's history of delivering new features and capabilities at a rapid pace.

In the past year, power optimisation (automatic clock gating); advanced datapath module generators; RTL, gate level, and placement level graphical debug environment (HDL Analyst and Physical Analyst); automated RTL floorplanning; and many other features have been delivered to customers under maintenance.

Synplicity's ASIC synthesis products have all features bundled into a single license; there are no separately priced options to purchase once you have chosen which product to use.

Synplicity's ASIC synthesis products are supported on all major platforms, including 64bit Solaris and Linux.

Synplicity attributes much of the success of its Synplify ASIC software to its collaboration with ASIC vendors to improve the gate-level netlist handoff process.

Synplicity believes with today's COT approach to design, the needs of front-end ASIC designers and ASIC vendors have not received the focus required to solve them.

Synplicity recently received full design kit support from Fujitsu Microelectronics in its December 2003 IP Symphony release for its EA82, SC82, CS86, CS91, CA91 (AccelArray) device technology.

In addition, Kawasaki Microelectronics is the latest ASIC vendor to provide support for the Synplify ASIC tool.

"We are pleased to offer synthesis libraries for Synplify ASIC", said Yoshihito Nishizaki, Group Chief, CAD System Front End Development for Kawasaki Microelectronics (KME).

"We share with Synplicity a focus on fast time-to-market for ASIC and FPGA to ASIC conversions".

Synplicity also continues to experience success in delivering ASIC synthesis and ASIC physical synthesis technology to the emerging structured and platform ASIC market.

In February 2003, Synplicity released the first custom mapping and optimisation software for NEC's ISSP structured ASIC devices.

In October 2003, Synplicity and NEC Electronics announced the development of the Amplify ISSP software, a dedicated physical synthesis for ISSP devices.

In April 2003 Synplicity and LSI Logic announced a collaboration to develop custom physical synthesis for LSI Logic's RapidChip platform ASIC technology.

LSI Logic's RapidWorx toolsuite entered into official production in January 2004, including the Amplify RapidChip software for customised ASIC physical synthesis of LSI Logic's RapidChip platform ASIC products.

"LSI Logic and Synplicity developed and released design tools in 2003 that are optimised for our RapidChip Platform ASICs", said Mark Nelson, senior director of RapidChip marketing at LSI Logic.

"As part of our RapidWorx design system, Synplicity's Amplify RapidChip physical synthesis has such tight correlation to the final route timing that customers are saving time and eliminating timing closure loops".

Synplicity's software has been endorsed for use by all current vendors of Structured and Platform ASIC products, and Synplicity has seen requests for the Synplify ASIC evaluation software double in the past year alongside the emergence of these new device architectures.

"Over the two and a half years we've been in the ASIC synthesis market, Synplicity has made a big impact", said John Gallagher, director of marketing for ASIC synthesis at Synplicity.

"In this relatively short amount of time, we believe we have delivered the area reduction, high capacity and fast runtimes our customer need for multi-million gate designs to be completed.

We have focused on ASIC vendor handoff flows, and we have worked more than 18 months to develop dedicated Structured and Platform ASIC products.

This has led to endorsements and development agreements with top ASIC vendors, tapeout successes and a growing worldwide customer base.

We believe we are the only ASIC synthesis provider whose explicit goal is to improve the front-end handoff process for ASIC vendors or back-end design teams, rather than competing with ASIC vendors by promoting COT flows".

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