FPGA software exploits latest device features

Synplicity has enhanced its Amplify FPGA physical synthesis and Synplify Pro FPGA synthesis software to include new support for Altera and Xilinx devices.

Synplicity has enhanced its Amplify FPGA physical synthesis and Synplify Pro FPGA synthesis software to include new support for Altera and Xilinx devices.

With this new version, the Synplify Pro software offers new features to support the recently announced Stratix II family of FPGAs from Altera.

Enhancements to Synplicity's Amplify FPGA physical synthesis software include support for a hierarchical timing report, enabling faster timing closure, and support for the low-cost Spartan 3 family of FPGAs from Xilinx.

With the latest versions of the Amplify 3.5 and Synplify Pro 7.5 software, Synplicity continues its efforts to deliver best-in-class performance for FPGA designers.

The latest version of the Synplify software includes an auto-constraint feature, providing significant savings in design time and a further advantage in timing performance.

This unique automatic constraint feature within the Synplify Pro software automatically tightens timing constraints until a maximum clock frequency is achieved.

This is done incrementally without the need to completely rerun synthesis, providing an automated way to boost timing performance of the design.

The auto-constraint feature typically gets within 5% of what handcrafted constraints can achieve, while eliminating the days or weeks designers often spend creating and modifying their constraints.

"We are committed to maintaining our leadership position in FPGA synthesis and believe we have extended our lead in both timing performance and area/cost reduction with this new release", said Jeff Garrison, Director of Marketing, Synplicity.

"Altera's Stratix II FPGAs are an impressive new family of devices that we believe will open up new types of applications for programmable logic.

The Stratix II family is built upon a new and innovative FPGA architecture and we have worked with Altera for over a year to provide excellent timing and area optimisations for our mutual customers upon its release".

Synplicity's Amplify FPGA software is the only true physical synthesis tool for FPGAs.

Other tools perform physical re-optimisations based upon initial place and route, but only the Amplify software performs simultaneous detailed placement and physical optimisations all the way from RTL through placed gates, resulting in higher-level optimisations and improved timing closure.

In the latest version of the Amplify software, Synplicity extracts a design's physical hierarchy and reports it through a hierarchical "island" timing report.

The island-based timing report enables faster timing closure by providing users with detailed guidance in order to make it easier to understand what portion of a design should be floor planned.

This timing report is also useful when creating physical constraints by identifying which instances belong to multiple critical paths and how the critical paths are connected together.

The Synplify 7.5 software delivers enhanced support for the Verilog2001 standard, including multidimensional array support.

This new support enables designers to describe their functionality more efficiently, significantly reducing pages of HDL code.

The Synplify Pro software also includes a new error messaging system that enhances productivity by making it easier for users to filter messages created by the Synplify software and view the messages by category.

For instance, the new system filters for warnings and errors so that users can see only new or selected types of errors and warnings during HDL compilation.

The Amplify 3.5, Synplify 7.5 and Synplify Pro 7.5 software are available now.

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