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Product category: Design and Development Software
News Release from: Synplicity | Subject: Amplify 3.5, Synplify 7.5 and Synplify Pro 7.5
Edited by the Electronicstalk Editorial Team on 25 February 2004

FPGA software improves Xilinx quality of
results

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Synplicity has enhanced its FPGA synthesis and physical synthesis software to provide optimised support for the latest version of Xilinx's Integrated Software Environment (ISE).

Synplicity has enhanced its FPGA synthesis and physical synthesis software to provide optimised support for the latest version of Xilinx's Integrated Software Environment (ISE) The Synplify Pro software and Amplify Physical Optimizer software provide enhanced timing correlation and an improvement in overall quality of results (QoR) significantly contributing to the performance advantage announced by Xilinx in its ISE 6.2i press release

In addition to offering Synplicity's signature benefits, such as ultrafast runtimes and ease of use, the Synplify Pro 7.5 and Amplify 3.5 tools build on Synplicity's true timing-driven synthesis technology to provide designers with just enough performance to meet timing goals while using the smallest, least costly, device possible.

"The tremendous improvements in both performance and cost reduction of modern programmable logic is leading to the widespread adoption of FPGAs in a variety of applications", said Jeff Garrison, Director of Marketing for FPGA products at Synplicity.

"Synplicity's latest round of enhancements reflects our commitment to provide the tools that will continue to push the performance and cost reduction envelopes and expand the use of FPGAs by electronics designers.

Additionally, we continue to work closely with Xilinx, to seamlessly integrate our synthesis technology within its ISE 6.2i software to ensure our mutual customers have an extremely productive design environment for their FPGAs".

"By offering enhanced support for our ISE 6.2i release with their latest FPGA synthesis and physical synthesis products, Synplicity has contributed to the 40% performance advantage of Virtex-II Pro FPGAs over the closest competition", said Jerry Banks, Director of Global Alliances at Xilinx.

"Together, Xilinx and Synplicity continue to address customer's requirements for high-performance and cost-efficient designs".

Supporting all Xilinx FPGA families, the Synplify Pro 7.5 tool now includes an automatic constraint feature that incrementally bumps up timing constraints to achieve a maximum clock frequency.

This feature has achieved performance within 5% of that accomplished by hand tuning timing constraints on several designs tested making it useful for a quick estimate of what performance can be expected with a particular HDL design.

The Synplify Pro software also includes new enhancements to the compiler including support for multidimensional arrays in Verilog 2001.

This feature is used to group elements into multidimensional objects, called vector types making coding much more concise.

Several new attributes to the Synplify Pro software have been added including a global buffer attribute and a keep hierarchy attribute.

The syn_global_buffer attribute allows the user to specify the maximum number of global clock buffers to be used in the design.

The xc_use_keep_hierarchy attribute is used to pass Xilinx's keep hierarchy attribute to Xilinx's back end tools.

This is useful in modular and incremental design flows where the user wants to lock down a portion of the design and performs no additional optimisations on it.

Additionally this release includes a new errors, messages, and warnings guide, which offers tips on what to do when confronted with certain error messages.

Amplify 3.5, Synplify 7.5 and Synplify Pro 7.5 are available now.

The Xilinx ISE 6.2 software is available now through Xilinx.

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