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DSP software makes more of Simulink specifications

A Synplicity product story
Edited by the Electronicstalk editorial team Feb 1, 2005

Synplicity has unveiled enhancements to its Synplify DSP software, a premiere DSP synthesis solution for implementing DSP designs in FPGAs.

Synplicity has unveiled enhancements to its Synplify DSP software, a premiere DSP synthesis solution for implementing DSP designs in FPGAs.

The enhancements include new DSP synthesis optimisations for performance and area, additional blockset functionality, including support for saturation/rounding, and a customisable DSP block library, allowing designers to quickly add custom DSP IP to their library.

The Synplify DSP software provides users of the Simulink design environment from The MathWorks with the industry's only technology-independent DSP synthesis path from Simulink to hardware, enabling designers to select their FPGA of choice for hardware implementation.

Synplicity's Synplify DSP software optimises Simulink designs by quickly producing circuits that can deliver faster performance and smaller area than alternative DSP implementation tools.

"The Synplify DSP product is the only DSP synthesis solution available that truly separates the algorithm captured in Simulink from its actual implementation in hardware", said Jeff Garrison, Director of Marketing, Synplicity.

"As such, DSP algorithm designers don't have to know details about the FPGA's architecture, such as clocks, latency, logical structure and storage, to effectively use the software".

"The tool allows DSP designers to focus on the development and verification of the algorithm and then automatically produce clean, highly optimised RTL code for implementation".

"Synplicity provides the only DSP synthesis tool that takes advantage of Simulink Fixed Point, which gives users access to the full power of the Simulink design and analysis tools", said Ken Karnofsky, Marketing Director for Signal Processing and Communications Products at The MathWorks.

"By leveraging the fixed point data types, data is automatically propagated through the Synplify DSP block set in Simulink without the need for designers to insert gateways into their Simulink design".

Enhancements to the Synplicity Blockset, such as saturation and rounding, enable more efficient specification and area optimised implementation for applications that require this behaviour.

The improved system-level optimisations, which include retiming for performance and folding for area efficiency, help produce better performing designs such as those containing FFT blocks.

Included in the Synplify DSP software is a set of functional blocks commonly used in DSP design, such as filtering (FIR, IIR), transforms, maths functions, signal operations, memories and control logic.

These technology-independent blocks are built on The MathWorks' fixed point data type and are tightly integrated into The MathWorks environment, allowing the algorithm designer to continue to use familiar Simulink capabilities such as discrete-time simulation, multirate management, fixed-point quantisation and scope debugging.

Synplify DSP has been optimised to work seamlessly with Synplicity's newest version of Synplify Pro software (version 8.0).

Using Synplify DSP and Synplify Pro tools together provides DSP designers with two levels of optimisation - first the Synplify DSP software's system level retiming and folding is done in a technology independent way followed by the Synplify Pro software's technology specific optimisations to give a highly optimised DSP design in the chosen FPGA.

Synplicity's unique capability to create custom DSP IP using a base blockset within the Synplify DSP software has been added.

By building customised IP with Synplicity's blockset, users can take full advantage of the system-level optimisation engine within Synplify DSP.

Optimisations such as retiming, folding and multichannelisation allow area-speed tradeoffs to be performed automatically.

With the Synplify DSP toolbox, users can generate high-quality RTL code and a test bench from Simulink specification.

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