Synplicity shifts focus from ASIC design

Synplicity is to refocus its R and D investment and headcount on its strategic growth opportunities in FPGA implementation and ASIC verification.

Synplicity is to refocus its R and D investment and headcount on its strategic growth opportunities in FPGA implementation and ASIC verification.

"LSI Logic's recent decision to withdraw their RapidChip platform ASIC product from the market prompted a reassessment of the market opportunity associated with our investments in the ASIC product line", said Gary Meyers, Synplicity's CEO and President.

"The impact of their withdrawal delays the estimated time at which our ASIC software business could become profitable".

"While we continue to see growth potential in the structured ASIC market, we see a greater return in our FPGA implementation, ESL synthesis for DSP and ASIC verification products", continued Meyers.

"Our decision then, is to withdraw from the cell-based and structured ASIC markets while we continue to support our existing customers and honour our ongoing obligations with Fujitsu Microelectronics, LSI Logic and NEC Electronics".

"About half of our ASIC R and D team will be redeployed to other exciting growth opportunities".

"We have an outstanding ASIC development team, and with their new focus on products such as Synplify Premier, Certify and Synplify DSP, we can accelerate our lead in these key growth markets", Meyers concluded.

The plan to exit the ASIC markets includes a workforce reduction of approximately 8%, concentrated in the company's Sunnyvale facility.

The reduction in force is estimated to reduce the company's annual personnel-related expenses by approximately $4.5 million per year.

Severance costs and the impairment of capitalised software development costs are estimated to result in a charge to the company of approximately $900 thousand in the March 2006 quarter.

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