Product category:
Design and Development Hardware
News Release from: Synplicity | Subject: HAPS-51
Edited by the Electronicstalk Editorial
Team on 26 September 2007
ASIC prototyping board boasts biggest
FPGA
System provides a cost-effective, high-performance prototyping solution that reduces development time for today's challenging SoC designs.
Synplicity has expanded its HAPS (High-performance ASIC Prototyping System) product family The HAPS-51 leverages the Xilinx Virtex-5 LX330, the industry's largest FPGA, and onboard memory to deliver faster ASIC verification
This article was originally published on Electronicstalk on 8 Jun 2001 at 8.00am (UK)
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Previous HAPS systems employed daughterboards for memory access; the new HAPS-51 uses memory located on the board and next to the FPGA device.
As a result, the HAPS-51 system provides a cost-effective, high-performance prototyping solution that reduces development time for today's challenging SoC designs.
The HAPS systems are the centrepiece of Synplicity's powerful Confirma at-speed ASIC/ASSP verification platform.
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Synplicity's FPGA logic synthesis and physical synthesis products can provide full support for the new Xilinx Integrated Software Environment (ISE) 4.1i.
The modular and extensible architecture of the HAPS-51 system offers several beneficial features that are designed to appeal particularly to SoC designers and software developers.
As with all HAPS systems, HAPS-51 uses the HapsTrak standard: a set of guidelines for pinout and mechanical characteristics to help ensure compatibility with previous and future generations of HAPS motherboards and daughterboards.
A tight connection between the FPGA and the onboard DDR2 memory module enables flexible, high-speed memory access making the HAPS-51 a unique verification platform for all SoC designs with embedded processors and large software content.
As with all HAPS-50 systems, the HAPS-51 is equipped with programmable clock generators, sophisticated monitoring and self-test features, as well as remote configuration and setup capabilities.
Additionally, multiple boards can be stacked or interconnected to support virtually any size ASIC, ASSP or SoC design.
"We have responded directly to customer requests for a HAPS platform that connects memory directly to the FPGA", says Lars-Eric Lundgren, General Manager of Synplicity Hardware Platforms Group.
"The unique features in the HAPS-51 system combined with Synplicity's FPGA synthesis and debug software equips design teams with an outstanding solution for verifying the functionality of today's most advanced and challenging designs".
During October and November 2007 Synplicity and Xilinx will present industry-leading design and verification methodologies and provide valuable information to help designers save time and money on current or future design projects.
In Europe, seminars will take place in the Netherlands (Eindhoven), the UK (Cambridge), Sweden (Stockholm), France (Paris), Germany (Munich) and Israel (Hertzliya).
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