Product category:
Design and Development Software
News Release from: SynTest Technologies | Subject: TurboDFT
Edited by the Electronicstalk Editorial
Team on 02 November 2001
Design for test software improves SoC
quality
TurboDFT from SynTest Technologies integrates test-ready blocks and intellectual property cores for better SoC testability.
TurboDFT from SynTest Technologies integrates test-ready blocks and intellectual property cores for better SoC testability TurboDFT works with any test-ready block or core and accepts RTL, gate-level and mixed-level design descriptions
This article was originally published on Electronicstalk on 2 Nov 2001 at 8.00am (UK)
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TurboDFT improves the quality of IC and SoC designs.
With TurboDFT, test-ready design blocks or cores, such as scan cores; logic, memory or analogue BIST cores; or boundary scan (JTAG) cores can be easily and automatically integrated (when compared to manual methods) and tested.
TurboDFT accepts RTL, gate level and mixed-level design descriptions, and generates test benches for the blocks or cores.
According to Ravi Apte, Vice President of Marketing and Business Development at SynTest, "Our customers are increasingly doing more designs with test-ready blocks and cores.
One of the most time-consuming processes is manually stitching together the intellectual property cores from different sources and in different forms, while maintaining the design's testability.
TurboDFT makes this process easier by automatically integrating the cores and generating top-level test benches".
Apte added, "We believe TurboDFT can shave weeks from this otherwise tedious manual process, and this could be a 10 or 20% saving in time over the manual process for complex designs.
Also, because TurboDFT's process is automatic, the number of errors is reduced when compared to a manual process".
TurboDFT works with any test-ready design block as well as design blocks produced using SynTest's scan, boundary scan and BIST tools to improve a SoC design's testability.
It produces top-level test benches for hierarchical designs.
TurboDFT runs on Sun Solaris, HP-UX and Linux platforms.
It supports Verilog and VHDL designs.
It is available now.
The US price is $50,000 (USD).
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