Product category:
Design and Development Hardware
News Release from: SynTest Technologies | Subject: TurboDebug-SoC/Memory
Edited by the Electronicstalk Editorial
Team on 10 July 2002
Debugger gets to the root of embedded
memories
TurboDebug-SoC/Memory from SynTest Technologies reduces the cost of test and debug for SoCs with large BISTed embedded memories.
TurboDebug-SoC/Memory from SynTest Technologies reduces the cost of test and debug for SoCs with large BISTed embedded memories Ravi Apte, Vice President of Marketing and Business Development at SynTest, noted, "We are all about reducing the cost of test
This article was originally published on Electronicstalk on 2 Nov 2001 at 8.00am (UK)
Related stories
JTAG-based PCB debug system cuts test costs
SynTest Technologies is entering the test and debug market for electronic design with a new family of products it says will reduce the cost of test and debug.
Design for test software improves SoC quality
TurboDFT from SynTest Technologies integrates test-ready blocks and intellectual property cores for better SoC testability.
Our new TurboDebug product adds the ability to design and debug SoC memory, when using a BIST methodology.
It further expands our DFD product line from PCB debugging to embedded memory debugging".
TurboDebug-SoC/Memory debugs and diagnoses failures on large embedded memories.
It tests and debugs BISTed embedded SRAM/ROM memory on ASICs/SoCs.
It enables users to detect memory failures down to the bit level.
The testing and diagnosis is easy to perform using pull-down menus.
Error types and locations of the errors are displayed on the PC screen.
Today ASICs/SoCs demand more embedded memories than ever before.
More than 30% of premium space and 50% of the transistors could be allocated to memory alone, and the memory blocks can be located at physically diverse locations in the circuit.
This mandates that to ensure reduced failure rates and increased quality, the embedded memories be tested thoroughly.
built-in self-test (BIST) for memories is a solution that has rapidly become popular.
TurboDebug-SoC/Memory operates on a PC that has a PCI slot and runs Linux.
All communication between the PC and the chip-under-test is via boundary scan (JTAG) connections.
It comes with an interface board that plugs into the PCI-slot of a PC, and a demo system board.
For testing, users connect the PC-based interface board via a 9-pin or a 25-pin DB connector to boundary scan pins (TDO, TDI, TCK, TMS and TRST) on the user's system board.
TurboDebug-SoC/Memory is available for beta testing now.
Production units will ship end of 2002.
Pricing for SynTest's TurboDebug product line starts at US $50,000.
SynTest's TurboDebug products run on Linux.
(This was Electronicstalk's Top Story on 9 July 2002).
• SynTest Technologies: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
