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Product category: Design and Development Software
News Release from: Synopsys
Edited by the Electronicstalk Editorial Team on 18 April 2001

UMC, Synopsys and Virtual Silicon
collaborate

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UMC customers can now use Synopsys' Physical Synthesis, a proven methodology for solving timing closure challenges, with physical IP from Virtual Silicon targeted towards UMC process technologies.

UMC customers can now use Synopsys' Physical Synthesis, a proven methodology for solving timing closure challenges, with physical IP from Virtual Silicon targeted towards UMC process technologies The UMC 0.13-micron libraries with Synopsys' Physical Compiler views will be available from Virtual Silicon in Q2 2001

The 0.18- and 0.15-micron libraries will also be ready for download from Virtual Silicon's website in the same time frame.

"We are constantly looking at new approaches to enable our customers to get to silicon faster and accordingly have collaborated with Synopsys and Virtual Silicon to create solutions for our joint customers", said Edward Wan, vice president of worldwide field engineering at UMC.

"Virtual Silicon has been helping with this effort by creating libraries that enable EDA tools and IP to target our fabs".

"We are very pleased that UMC is supporting the Synopsys' Physical Synthesis methodology with Virtual Silicon libraries.

UMC is the first foundry vendor to announce support for our physical synthesis tools", said Sanjiv Kaul, senior vice president and general manager of Synopsys' Physical Synthesis business unit.

"Some of our joint customers have already taped out with UMC and with this announcement we expect many more customer successes.

Synopsys' Physical Synthesis is the leading timing closure solution with support from multiple semiconductor vendors".

"Our customers have been achieving excellent results with Synopsys' Physical Synthesis and our eSi-Route libraries for UMC", said Taylor Scanlon, president and CEO of Virtual Silicon.

"We are committed to support Synopsys' Physical Synthesis tools with our Silicon Ready IP to provide the accurately modelled timing and placement solutions required by today's leading-edge SOC designers that use UMC's fabs".

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