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News Release from: Synopsys | Subject: The art of verification with VERA
Edited by the Electronicstalk Editorial
Team on 11 September 2001
The art of verification with VERA
Verification Central and Synopsys have jointly launched a new book: 'The art of verification with VERA', by Faisal Haque, Khizar Khan and Jonathan Michelson.
Verification Central and Synopsys have jointly launched a new book: 'The art of verification with VERA', by Faisal Haque, Khizar Khan and Jonathan Michelson Intended to address the increasing difficult task of verifying complex chip designs, Synopsis reckons the book represents a significant contribution to the field of design verification by making the subject accessible and easy to understand through the use of clear explanations and relevant examples
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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Faisal Haque and Jonathan Michelson are currently employed at Cisco Systems, and Khizar Khan is currently employed at Sun Microsystems.
"This is a great technical book on verification for SoC designs", said Janick Bergeron, chief technical officer at Qualis Design and editor of the Verification Guild.
"The authors' expertise in using VERA to verify data networking designs is obvious through their use of lifelike examples and large quantity of code examples.
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I especially like their process for developing a verification plan".
Readers from all levels and backgrounds can gain valuable insight from this book.
Beginners can quickly learn the tasks involved in verifying complex SoC designs using the VERA testbench automation tool and OpenVERA, an open-source hardware-verification language.
"'The art of verification with VERA' is a must read for teams designing and verifying complex ASICs, SoC ASICs or full custom chips.
It teaches both VERA and sound verification techniques in general", said Dan Lenoski, director of engineering at Cisco Systems.
"Thorough verification and high productivity is critical to all ASIC engineers and managers.
This book's detailed explanations of the key concepts and real-life examples are invaluable".
Engineers who are familiar with Verilog or C languages will be able to learn the OpenVERA language quickly in order to build complex SoC testbenches.
Experienced readers can benefit from the authors' experience in applying the OpenVERA language to the verification of large SoC designs.
Throughout the book, the authors provide numerous real-world examples in the processor and networking fields to help the reader understand and master the concepts presented.
"In this book, Haque, Khan, and Michelson have done an excellent job of unlocking the potential of the VERA testbench automation tool, and the OpenVERA open source hardware verification language", says Farhad Hayat, vice president of marketing of the Verification Technology Group at Synopsys.
"This book takes the reader down the path of success with VERA.
Every designer should consider placing it at the top of their reading list".
'The art of verification with VERA' is available immediately.
To find out more about the book or to order it online, visit www.verificationcentral.com.
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