Product category:
Design and Development Software
News Release from: Synopsys | Subject: NanoSim and SiliconSmart MR
Edited by the Electronicstalk Editorial
Team on 13 December 2001
Easier route to SoC memory
characterisation
Synopsys and Silicon Metrics Corp have developed a memory characterisation solution based on Synopsys' NanoSim multilevel mixed-signal simulator and Silicon Metrics' SiliconSmart MR.
Synopsys and Silicon Metrics Corp have developed a memory characterisation solution based on Synopsys' NanoSim multilevel mixed-signal simulator and Silicon Metrics' SiliconSmart MR The solution leverages the NanoSim hierarchical array reduction (HAR) technology and the SiliconSmart MR memory characterisation and modelling tools to deliver production-ready memory models for SoC design
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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Most of today's SoC designs contain multiple embedded memories ranging in size from a few to hundreds of kilobytes.
To jumpstart their SoC designs, designers often look to compiled memory models that must be recharacterised to ensure they are bug-free and production-ready.
Together, NanoSim and SiliconSmart MR offer a fully automated solution that handles this memory recharacterisation efficiently and produces highly accurate results.
"NanoSim's unique HAR technology allows entire memories to be simulated quickly and accurately without netlist pruning.
This makes NanoSim a very attractive platform for SiliconSmart MR", said Callan Carpenter, president and CEO of Silicon Metrics.
"Given the level of pain associated with memory characterisation today, this solution offers customers an immediate and significant ROI".
SiliconSmart MR and NanoSim bring tools to the SoC designer's desktop for characterisation set-up and simulation that make it easy to acquire high-quality models for embedded memories.
Plus, SiliconSmart MR reads and writes timing models in the industry-standard Synopsys Liberty (.lib) format, speeding re-use in downstream applications.
"NanoSim is the trusted full-chip multilevel simulator for mixed signal and memory design verification", said Antun Domic, senior vice president, Synopsys' nanometer analysis and test group.
"The combination of SiliconSmart MR and NanoSim delivers high-quality, accurate timing and power models for Synopsys design flows.
We encourage our customers to consider SiliconSmart MR and NanoSim for embedded memory characterisation and modelling".
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