Product category:
Design and Development Software
News Release from: Synopsys | Subject: Physical Compiler 2002.02
Edited by the Electronicstalk Editorial
Team on 12 April 2002
Physical synthesis extends beyond 20
million gates
Physical Compiler 2002.02 is the latest version of the premier physical synthesis tool from Synopsys, providing designers with a timing closure flow that scales to twenty million plus gate designs.
Physical Compiler 2002.02 is the latest version of the premier physical synthesis tool from Synopsys, which provides designers with a timing closure flow that scales to twenty million plus gate designs There are three key capabilities introduced in this release of Physical Compiler that enable this high capacity flow: 64bit platform support to more than double the practical capacity, interface logic models, also supported by PrimeTime to extend its hierarchical chip level capacity, and a new quick mode that offers a fivefold runtime improvement in a design exploration flow
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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"These capacity requirements are being addressed through the availability of Physical Compiler in the 64bit mode.
We have successfully used Physical Compiler 64bit software for some of our most challenging designs, and intend using it for domestic designs in the future".
As designers move to a hierarchical methodology, they use models to represent the lower level blocks while closing chip level timing.
In this release, Physical Compiler introduces support for interface logic models (ILMs).
These are the same models used by PrimeTime for chip level timing analysis.
ILMs are highly accurate yet compact physical models of the design netlist.
The high levels of compaction offered by using ILMs at the top level enable a powerful chip-level timing closure solution that avoids the capacity and run time issues associated with very large designs.
Synopsys is also introducing a new quick mode in Physical Compiler that offers customers 5-10 times faster run times when exploring different design implementations.
"With this release of Physical Compiler, we have delivered a design flow that enables our customers to achieve timing closure quickly and efficiently for multi-million-gate designs", said Sanjiv Kaul, senior vice president and general manager, Physical Synthesis business unit, Synopsys.
"With our continued emphasis on delivering the best-in-class solution to our customers and by focusing on their success, Synopsys' Physical Synthesis has become integral to our customers' flows".
Physical Compiler is also available on the Linux platform.
As design complexity increases, engineers are relying on large networks of high-performance workstations.
Low-cost, reliable, workstations running Linux provide an ideal development platform The availability of Physical Compiler on Linux provides designers of complex ICs and SoCs with a high-throughput, low-cost design implementation environment.
Physical Compiler release 2002.02 is currently available to customers on a limited basis.
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