Product category:
Design and Development Software
News Release from: Synopsys | Subject: OpenVera 2.0
Edited by the Electronicstalk Editorial
Team on 17 April 2002
Hardware verification takes on new Intel
spec
Synopsys has released OpenVera 2.0, with new additions to OpenVera assertions based on Intel's ForSpec language.
Synopsys has released OpenVera 2.0, with new additions to OpenVera assertions based on Intel's ForSpec language OpenVera 2.0 combines the strengths of the OpenVera hardware verification language with Intel's newest formal verification language (ForSpec) to deliver a more comprehensive, open source hardware verification language to the verification community
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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The combined technology enables OpenVera users to leverage next-generation functional verification methodologies by providing one common language for writing assertions and formal properties.
The addition of new assertions in OpenVera 2.0 marks a significant step forward in achieving OpenVera's objective of easing the verification bottleneck by enabling the development of a complete solution around an open, non-proprietary hardware verification language.
"Intel has many years of experience developing formal verification languages.
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ForSpec, our newest language, is being used by several of our processor and chipset projects", said Greg Spirakis, vice president of Design Technology at Intel.
"By working with Synopsys, we are bringing our formal verification technology into an open source environment.
We believe in open source standards and work with EDA vendors to bring out tools to support such a standard".
"Our collaboration with Intel is an example of how the EDA community can quickly improve the OpenVera standard", said Manoj Gandhi, senior vice president and general manager, Verification Technology Group at Synopsys, "At Synopsys, we are committed to providing an open source, state-of-the art hardware verification language for the whole user community".
Assertions are statements used to specify design behaviour.
These statements are used interchangeably as monitors to detect incorrect design behaviour in dynamic simulation or as properties to be proven exhaustively using formal verification.
OpenVera assertions can be used to succinctly describe design specifications, minimising the amount of code a user needs to write.
With clear specifications and less code, verification is more productive.
With the addition of Intel's ForSpec language, OpenVera 2.0 has been extended to provide language features for formal and hierarchical verification and to support a wider array of design styles with asynchronous resets and complex clocks.
OpenVera 2.0 has been architected to deliver the best performance for use in both dynamic simulation and formal verification, enabling assertion-based verification for today's complex SoC designs.
@HDL, an EDA vendor in San Jose, California, plans to support OpenVera 2.0 with new assertions in its @Verifier product.
"@Verifier is an automatic formal model-checking tool that incorporates Adaptive Functional Verification techniques", said Badru Agarwala, president and CEO of @HDL.
"We plan to automatically generate OpenVera assertion-based properties for designs and also formally prove user-written OpenVera assertion properties.
OpenVera assertions are well suited to support our hybrid solution that combines the benefits of model checking and dynamic simulation".
"The emerging assertion-based methodologies are crucial for complex IC and SoC design.
Designers need seamless operations across HDLs, testbench code and assertions", said Scott Sandler, president and CEO, Novas Systems.
"That is why we are expanding our debug technology to support assertions and are working with Synopsys to integrate OpenVera assertions with our Debussy debug system".
SoC design teams, verification teams and EDA developers can access OpenVera 2.0 by downloading the Language Reference Manual (LRM) from the OpenVera website at www.open-vera.com.
There are no licensing fees for OpenVera and access to the language and documentation is unrestricted, subject to the OpenVera license.
Synopsys serves as the managing entity of OpenVera and co-ordinates the language development.
Developers may contribute to the language and may use it to create complementary tools.
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