SoC integration methodology speeds ARM trade

ARM, Synopsys and TSMC have collaborated in generating a proven, fast-track SoC integration methodology for use by ARM partners who use TSMC as a foundry.

ARM, Synopsys and TSMC have collaborated in generating a proven, fast-track SoC integration methodology for use by ARM partners who use TSMC as a foundry.

The companies have linked the TSMC reference flow and the ARM-Synopsys reference methodology to create an easy-to-use SoC integration methodology guide that reduces risk and accelerates time-to-volume.

This collaboration is the first milestone in a series of initiatives between the three companies intended to provide their mutual customers with access to the latest silicon processes and advanced methodologies.

With the SoC integration methodology guide, both customer-owned tooling and integrated device manufacturer designers can take advantage of the combined benefits of the TSMC reference flow and the ARM-Synopsys reference methodology.

The TSMC reference flow provides developers with a silicon-proven methodology that dramatically reduces time-to-volume by enabling direct manufacturability to TSMC's industry-leading process technologies.

The ARM-Synopsys reference methodology enables SoC developers to access ARM microprocessor cores quickly and efficiently.

"ARM, Synopsys, and TSMC each play a key role in the execution of Oak's SoC strategy", said Barry Cornell, vice president of operations and quality for Oak Technology.

"The enhanced productivity benefits achieved with a unified SoC integration methodology exemplifies their alignment to accelerate the underlying processes we use, so that Oak can focus on device innovation and performance optimisation for our target markets".

"Design teams can expect to create SoC designs ready for manufacturing faster and more confidently by using the flow recommendations developed in this collaboration", said Dr Ping Yang, vice president of research and development for TSMC.

"We intend to expand this collaboration over time to further address designers' needs to get to market and to volume quickly with chips built around state-of-the-art ARM cores".

"End designers can now benefit from the integration of two robust methodologies that leverage Synopsys' advanced EDA technology for a low-risk proven path to silicon", said Rich Goldman, vice president of strategic market development at Synopsys, "Using the methodologies together, end designers can more efficiently integrate ARM microprocessor cores into their SoC designs for manufacture by TSMC to bring innovative products to market more quickly and reliably".

"It's important to enable developers who choose to use external fabrication facilities to work directly with ARM semiconductor foundry partners like TSMC", said Peter Hicks, general manager, Strategic Programs, ARM.

"This initiative, which builds on the existing relationships between ARM, Synopsys and TSMC, plays an important facilitating role by providing them with a proven methodology route to silicon".

TSMC is supporting the SoC integration methodology today for designs incorporating ARM hardened microprocessor cores.

The SoC integration methodology has support for the following Synopsys tools: Synopsys' Physical Compiler, Chip Architect, Design Compiler, DC Ultra, DesignWare, Formality, Power Compiler, DFT Compiler, TetraMAX ATPG, PrimeTime and VCS.

The SoC integration methodology is modular and based on standard interfaces allowing for the integration of complementary tools, libraries and IP cores.

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