Product category:
Design and Development Software
News Release from: Synopsys | Subject: DFT Compiler SoCBIST
Edited by the Electronicstalk Editorial
Team on 02 October 2002
Logic BIST reduces SoC test data and
time
Synopsys has entered the logic BIST market with DFT Compiler SoCBIST, offering deterministic logic BIST capabilities.
Synopsys has entered the logic BIST market with DFT Compiler SoCBIST, offering deterministic logic BIST capabilities Compared with full scan, SoCBIST provides designers significant savings in test cost by reducing test time and data volume, while deterministically retaining scan's very high fault coverage
This article was originally published on Electronicstalk on 23 Sep 2003 at 8.00am (UK)
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Our first application of this technology was on a 20-million-gate device.
The results have exceeded our expectations, showing off both the capability and maturity of this innovative new DFT platform".
"We have seen excellent test data volume and tester time reduction with Synopsys' SoCBIST - from RTL synthesis to gate-level diagnostics - and are very satisfied", said Seiichi Nishio, senior manager, System LSI Design Division, Semiconductor Company, Toshiba Corporation.
"SoCBIST is a straightforward extension of the Synopsys DFT Compiler and TetraMAX ATPG design flows we use.
We will use SoCBIST in upcoming ASSP products and intend to deploy SoCBIST within Toshiba design teams".
To meet strict product quality mandates without increasing the cost of design and test, designers need a DFT solution that provides predictable high fault coverage, requires minimal automatic test equipment usage, and does not impact the overall design flow.
Synopsys' SoCBIST meets these requirements, reducing tester time by more than 10 times and reducing data volume by 100 to 400 times compared to traditional scan.
Additionally, SoCBIST needs 20 or fewer ATE pins and requires less than 1% of the vector memory required by a full scan approach.
SoCBIST is transparently integrated within the Synopsys Design Compiler and Physical Compiler flows.
It is an extension of Synopsys' unique single-pass test synthesis flow, which enables designers to use SoCBIST directly within the physical synthesis environment.
This eliminates costly iterations between design synthesis and test implementation and enables IC designers to achieve timing and DFT closure simultaneously.
In addition, SoCBIST provides comprehensive and easy-to-use design rule checking and validation features, as well as powerful BIST integration, verification, diagnostic and debug tools.
"Our customers are faced with the conflicting demands of producing the highest quality products while reducing their overall test cost, and they are looking to us for a solution", said Antun Domic, vice president and general manager of Synopsys' Nanometer Analysis and Test business unit.
"Since SoCBIST is integrated within the industry-standard Synopsys synthesis flow, we enable our customers to preserve their existing investments in design and test automation tools and still achieve higher quality results at a lower cost".
SoCBIST is an add-on to DFT Compiler and will be available in a controlled availability basis with the September 2002 production release.
Pricing for the DFT Compiler SoCBIST add-on begins at $175,000 US list price for a one-year technology subscription licence.
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