Design reference flow to speed IBM foundry

IBM and Synopsys are working together to produce a design reference flow for IBM's 0.13 micron process technology.

IBM and Synopsys are working together to produce a design reference flow for IBM's 0.13 micron process technology.

The reference flow will provide foundry services customers with a smooth path from chip design to production, using Synopsys' electronic design automation (EDA) tools and design services and IBM's advanced manufacturing processes.

IBM's relationship with Synopsys is part of an IBM strategy to make IBM's most advanced chip-making technology available through high-volume chip manufacturing services.

"Synopsys has expertise in design tools and deep sub-micron flows, and experience using these advanced flows in a wide variety of applications", said Michael Concannon, Vice President, Foundry Services, IBM Microelectronics Division.

"Reference flows provide our foundry customers a qualified framework for implementing their high-performance designs in IBM's cutting-edge processes, which can translate into an accelerated path to production silicon".

IBM and Synopsys are basing the RTL-to-GDSII reference flow on a suite of Synopsys' IC implementation and analysis tools, including Floorplan Compiler for design planning, Physical Compiler for unified synthesis and placement, and Astro for physical implementation.

Synopsys' Milkyway database eliminates the need for data translation between these commercially available tools and offers proven performance and capacity requirements for tomorrow's nanometer designs.

In keeping with Synopsys' commitment to open standards, the flow supports the Liberty open source format and other standard formats that allow it to be augmented with tools from other EDA vendors.

"The design community is keenly interested in accessing IBM's leading semiconductor technology through a foundry business model using Synopsys products", said Joachim Kunkel, Vice President of Marketing, Synopsys IP and Design Services.

"Our collaboration goes beyond the creation of the reference flow by validating it in silicon.

As a provider of design services for IBM foundry customers, we leverage this experience to help chip developers achieve a predictable tape out".

The companies are validating the reference flow in silicon using a test chip that incorporates technology from several sources, including IBM, Synopsys, ARM and Artisan Components, reflecting real-world SoC design practices that require complex cores from multiple sources.

The reference flow is complementary to the IBM Blue Logic ASIC design methodology which also integrates Synopsys tools into the design flow.

As a result of the collaboration between the two companies, Synopsys has been awarded Advanced Business Partner status within IBM's PartnerWorld for Developers - a worldwide marketing and enablement programme for all business partners across IBM.

The reference flow is planned for availability after validation of the first test chip in the first quarter of 2003.

Customers using the reference flow will receive scripts and associated documentation from IBM.

In addition, IBM foundry customers can use Synopsys design services to accelerate the execution of the reference flow.

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