Product category:
Design and Development Software
News Release from: Synopsys | Subject: ARM-Synopsys Reference Methodology
Edited by the Electronicstalk Editorial
Team on 25 September 2003
ARM design software takes signal
integrity onboard
The ARM-Synopsys Reference Methodology, first introduced in 2001, now supports Galaxy SI, a comprehensive signal integrity (SI) solution within the Galaxy Design Platform.
The ARM-Synopsys Reference Methodology, first introduced in 2001, now supports Galaxy SI, a comprehensive signal integrity (SI) solution within the Galaxy Design Platform The ARM-Synopsys Reference Methodology has been established as the proven, complete solution for all ARM synthesisable microprocessor cores and has been integrated into the standard deliverables for the ARM1136JF-S core
This article was originally published on Electronicstalk on 7 Mar 2003 at 8.00am (UK)
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Adding signal integrity enhancements to address crosstalk delay, noise (glitch), IR (voltage) drop and electromigration to the ARM-Synopsys Reference Methodology now provides ARM partners with a complete SI-aware implementation solution for all ARM synthesisable processor IP.
Extending the ARM-Synopsys Reference Methodology that ARM has delivered to more than 20 of its largest partners enables them to adopt SI enhancements, including analysis and prevention, within an existing proven flow.
Many ARM partners plan to implement chips using silicon processes at 90nm and below, which means consideration of signal integrity issues early in the design flow has become an important step in the design process.
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The SI-aware Reference Methodology supports crosstalk prevention and optimisation during routing in Astro and signoff in PrimeTime SI.
"Three years ago, we started working on the ARM-Synopsys Reference Methodology, this has been continuously refined and augmented.
This Reference Methodology is used as a standard flow inside ARM for hardening IP.
We have had success in multiple hardening projects and we are currently working on timing closure at 90 nanometres", said Simon Segars, executive vice president of Engineering, ARM.
"Complete, integrated reference flows have already been delivered to our ARM1136JF-S core partners, the new signal integrity capability, enables our partners to resolve noise and cross-talk issues through the use of Synopsys' PrimeTime SI and Astro-Xtalk".
The proven ARM-Synopsys Reference Methodology forms the foundation methodology for ARM's preferred core hardening and modelling solution.
It significantly streamlines the process used by ARM partners to port synthesisable ARM microprocessor cores to their chosen technologies, by potentially reducing the time required to harden and model the core from months to weeks.
"The ARM-Synopsys Reference Methodology 4.1 has allowed Agere Systems' Design Centre in Ascot, UK to successfully develop several ARM core implementations.
This methodology has indeed provided us with adaptable, well documented and easy to modify scripts that cover the entire range of implementation activities", commented Dave Whittlesea, Senior ASIC Design engineer, Agere Systems.
"Agere plans to use the enhanced ARM-Synopsys Reference Methodology in our future projects to take full advantage of our advanced process technology".
"The ARM-Synopsys Reference Methodology provides comprehensive support for crosstalk, noise, IR drop and electromigration", said Rich Goldman, Vice President of Strategic Market Development at Synopsys.
"This SI-aware methodology extends the collaborative flow that ARM and Synopsys have developed over the past three years and delivered since 2001".
Since the creation of the ARM-Synopsys Reference Methodology, Synopsys has provided core hardening and integration services to licensees of ARM synthesisable IP - including successful core hardening projects undertaken directly for ARM.
By fully leveraging the Reference Methodology and expanded Galaxy SI solution in production design flows, Synopsys Professional Services' ARM technology-certified design centres create ARM core-based design implementations that are optimised to customer requirements for speed, power and silicon area.
ARM has adopted and standardised on the ARM-Synopsys Reference Methodology in its deliverables for all synthesisable processor IP.
The ARM-Synopsys Reference Methodology supports ARM's entire synthesisable processor portfolio including the ARM7TDMI-S core, the ARM7EJ-S core, the ARM926EJ-S core, the ARM946E-S core, the ARM966E-S core, the ARM1026EJ-S core and the ARM1136JF-S core.
Version 5 of the ARM-Synopsys Reference Methodology is expected to be available from 1st November 2003, at no charge to ARM Partners.
Synopsys Professional Services offers core hardening and integration services to ARM Partners, supplementing the service capabilities offered by ARM.
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