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Product category: Design and Development Software
News Release from: Synopsys
Edited by the Electronicstalk Editorial Team on 16 April 2004

New approach integrates IC design and
manufacture

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Synopsys and Taiwan Semiconductor Manufacturing Company (TSMC) have devised a new collaborative, holistic approach to integrating semiconductor design and manufacturing.

Synopsys and Taiwan Semiconductor Manufacturing Company (TSMC) have devised a new collaborative, holistic approach to integrating semiconductor design and manufacturing This optimised approach aligns design tools, mask creation, fabrication and test to achieve common goals for final silicon

The new initiative is dedicated to increasing cost effectiveness of 90nm designs and below, and to reducing time to market by focusing on design for manufacturing (DFM) issues such as improved yields, low power consumption and higher performance.

TSMC brings its portfolio of leading-edge process technologies and process-proven libraries to the collaboration and Synopsys contributes its industry-standard design platforms and DFM family of products.

Leveraging the key strengths of each company, the expanded commitment and combined resources will be dedicated to the development of technology solutions and design platforms that can meet the challenges of semiconductor design beyond the 90nm node.

"This expanded collaboration will benefit designs at and beyond the 90 nanometer node", said FC Tseng, Deputy Chief Executive Officer, TSMC.

"As leaders within our respective industries, TSMC and Synopsys are focused on accounting for all aspects of the final design through the entire design process, rather than relying on a sequential set of tasks performed in isolation.

By working together, we can influence what improvements are needed for process libraries, implementation tools and DFM processes to provide designers with optimised solutions".

"Synopsys and TSMC continue to strengthen our already productive relationship by collaborating on all critical steps in the design development process - from RTL to wafer.

By tying our entire set of design and DFM solutions directly to the process, designers can achieve better yields on parts, while meeting power and performance requirements in fewer design iterations", said Aart de Geus, Chairman and Chief Executive Officer of Synopsys.

"We have identified the key issues that directly impact customer designs at 90 nanometres: low power, high performance and time-to-yield.

These seemingly incompatible demands are specifically targeted and addressed through our collaboration with TSMC".

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