Product category:
Design and Development Software
News Release from: Synopsys | Subject: Galaxy
Edited by the Electronicstalk Editorial
Team on 30 April 2004
Toshiba tapes out multiple 90nm SoC
designs
Toshiba Corp has taped out multiple 90nm SoC designs for its audiovisual and office equipment product lines using the Synopsys Galaxy design platform.
Toshiba Corp has taped out multiple 90nm SoC designs for its audiovisual and office equipment product lines using the Synopsys Galaxy design platform The designs were created using Design Compiler and DesignWare Library for synthesis, Power Compiler for dynamic and leakage power optimisation, Physical Compiler and Astro for physical implementation, PrimeTime for delay calculation/static timing signoff, Star-RCXT for full-chip parasitic extraction signoff, and DFT Compiler SoCBIST for test
This article was originally published on Electronicstalk on 5 Feb 2003 at 8.00am (UK)
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Complete platform covers advanced IC design
The Galaxy Design Platform is an open, integrated design implementation platform with best-in-class tools, to enable advanced IC design.
Test solution aids core-based design development
Synopsys has added a comprehensive test automation solution for core-based designs to its DFT Compiler, a key component of the Galaxy design platform.
On its most recent design using the latest release of Astro, Toshiba was able to significantly boost design productivity, enabling a fast design turnaround time.
"Synopsys' Astro is an integral part of our design methodology and we use it for complex SoCs over five million gates", said Takashi Yoshimori, Technology Executive, Toshiba Corporation Semiconductor Company.
"The correlation between Astro, PrimeTime and Star-RCXT has resulted in improved timing convergence, and has improved the predictability of our design schedule.
Further reading
Analyser speeds to faster timing signoff
The latest release of PrimeTime - the timing backbone in Synopsys' Galaxy design platform - has set a new standard for performance in static timing analysis and signoff of multi-million-gate designs.
Tools form basis of TSMC Reference Flow
The Galaxy Design Platform and other Synopsys tools have been integrated into TSMC's advanced Reference Flow 4.0.
Astro has helped us boost our design productivity in the entire physical implementation process.
As a result, we have adopted it as the standard physical optimisation tool in our flow.
As Astro supports both flat and hierarchical design, Toshiba is able to effectively use over 50 million gates capacity using our 90-nanometre process technology".
"The productivity gain realised by using Synopsys' Galaxy platform in our advanced design flow enables our designers to turn around designs very quickly", stated Masataka Matsui, Senior Manager of the Digital Media SoC Department, SoC Research and Development Centre, Toshiba Corporation Semiconductor Company.
"Using Synopsys' tools, we have already taped out complex high-performance digital media processors for multimedia applications with very high clock speeds.
Astro will be used as the standard tool to develop our MeP high-end media embedded processor implemented in our 90-nanometre and below process technology".
"Synopsys' Astro technology is critical to the success of our designs", said Yoshiki Hayakashi, Senior Manager of the Digital Consumer SoC Group, Custom SoC Technical Marketing and Engineering Department, Toshiba Corporation Semiconductor Company.
"Astro's streamlined, easy-to-use and highly productive environment allows our designers to quickly turn around their designs, and with the other Synopsys tools in our design flow, we are able to reuse existing design data".
"Customers such as Toshiba are increasingly turning to design productivity solutions like Astro in order to get their products to market quickly", said Antun Domic, Senior Vice President and General Manager of the Implementation Group at Synopsys.
"Toshiba has consistently increased its adoption of Galaxy technology in its advanced design flow.
This has enabled Toshiba to deliver advanced, leading-edge chips to their customers".
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