Product category:
Design and Development Software
News Release from: Synopsys | Subject: Galaxy Power
Edited by the Electronicstalk Editorial
Team on 10 June 2004
Software addresses core power issues
Galaxy Power is billed as offering the industry's first comprehensive low-power solution for today's most advanced, high-performance 90nm designs.
Galaxy Power is billed as offering the industry's first comprehensive low-power solution for today's most advanced, high-performance 90nm designs ARM, IBM and Nvidia have selected Synopsys' Galaxy Power to achieve best-in-class low-power optimisation in their next-generation designs
This article was originally published on Electronicstalk on 19 Apr 2001 at 8.00am (UK)
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Synopsys' Galaxy Power delivers 2x power reduction without impacting the implementation flow, and offers new capabilities for standby mode (state retention) designs and support for multithreshold designs.
"By using Synopsys' Galaxy design platform, we were able to design the GeForce 6800, a complex 222-million transistor graphics processing unit designed for ultimate performance with low power requirements", said Dan Smith, Director of Engineering, Nvidia.
"With Synopsys' low power solution, we are able to achieve significant dynamic power reduction with greater than 12% savings in area".
Further reading
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In conjunction with IP 2001 Japan, Synopsys has announced the PCI Special Interest Group (PCI-SIG) certification of the DesignWare PCI-X MacroCell.
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Oki Semiconductor has added Power Compiler, Synopsys' pushbutton power optimisation tool for RTL and gate-level designs, to the set of Synopsys tools offered in Oki's advanced ASIC design kit.
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"As a result, Galaxy Power is now a standard for power management in our design flow".
"We have collaborated with Synopsys and qualified its Galaxy Power solution for our 90nm ASIC design flow", said Richard Busch, Director, ASIC Business Unit, IBM Systems and Technology Group.
"Our customers can now optimise chips designed to reduce power using Galaxy Power as an integrated solution within IBM's ASIC methodology flow".
Synopsys Galaxy Power offers a customer-proven solution for low-power optimisation and power integrity.
For low power, Galaxy Power delivers power grid synthesis and power optimisation with support for automatic hierarchical clock-gating, multiple-voltage designs, multithreshold leakage, and state retention power-gating.
Vector-free power analysis and sign-off level power integrity - including voltage-drop and electromigration analysis - are also part of Galaxy Power.
Galaxy Power provides a seamless flow with test (DFT Compiler and TetraMAX), timing (PrimeTime and PrimeTime SI) and verification (Formality and VCS).
The full complement of capabilities in Galaxy Power gives designers a predictable, 90nm-proven design flow that speeds timing, area and power convergence, enabling rapid design closure.
"ARM has partnered with Synopsys on low energy design, and we have jointly developed a test chip with the Synopsys Galaxy design platform and the ARM Intelligent Energy Manager (IEM) technology to demonstrate up to 60% core energy reduction in a typical MP3 use case", said Clive Watts, IEM Product Manager, ARM.
"At DAC 2004, ARM and Synopsys are highlighting the ARM926EJ-S applications processor-based IEM demonstrator system implemented using Synopsys' Galaxy design platform".
"Synopsys is delivering production-proven power solutions that enable market leaders to speed design convergence and reduce overall fabrication cost".
"Our customers are reporting 60 to 95% leakage power reduction with no degradation in chip performance, and significant area savings", said Antun Domic, Senior Vice President and General Manager of Synopsys Implementation Group.
"ARM, IBM and Nvidia have selected Galaxy Power for its unique ability to deliver mission-critical power reduction within the Galaxy design platform".
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