Product category:
Design and Development Software
News Release from: Synopsys | Subject: NanoSim
Edited by the Electronicstalk Editorial
Team on 22 September 2004
Simulator speeds analogue-RF circuit
verification
Wireless LAN specialist Atheros Communications has adopted NanoSim for RF front-end circuit verification of its AR5005G single-chip wireless solution.
Wireless LAN specialist Atheros Communications has adopted NanoSim for RF front-end circuit verification of its AR5005G single-chip wireless solution The chip is a multi-million-gate IC that supports the IEEE802.11b and 802.11g protocols
This article was originally published on Electronicstalk on 13 Dec 2001 at 8.00am (UK)
Related stories
Easier route to SoC memory characterisation
Synopsys and Silicon Metrics Corp have developed a memory characterisation solution based on Synopsys' NanoSim multilevel mixed-signal simulator and Silicon Metrics' SiliconSmart MR.
Circuit simulator joins Cadence environment
The Synopsys NanoSim circuit simulator has been integrated into the Cadence Analogue Design Environment using the Cadence Open Analogue Simulation Socket (OASIS).
Using NanoSim 2004.06, Atheros engineers now can perform RF front-end circuit verification of their complex mixed-signal devices to help ensure first silicon success.
"NanoSim has given us tremendous productivity and good accuracy with a 10x runtime improvement over Spice-based simulators", said Rick Bahr, Vice President of Engineering at Atheros Communications.
"With NanoSim, we were able to verify the entire synthesiser behaviour of our AR5005G, the world's first single-chip IEEE802.11g solution".
"We chose NanoSim as a verification tool because it could handle the size and complexity of our leading-edge, mixed-signal chip".
NanoSim is an advanced transistor-level fast Spice simulation and analysis tool for analogue, digital and mixed-signal design verification.
With the 2004.06 release, NanoSim became the only fast Spice simulator that directly uses foundry-certified HSpice models and model evaluation engine to provide accurate circuit simulation.
It features high simulation throughput and capacity for multi-million transistor designs and simulation accuracy for the most advanced IC processes technologies in CMOS, BiCMOS and SOI.
"To effectively and timely verify today's complex mixed-signal IC chips, designers need to simulate ever larger portions of the circuit at the transistor level at higher throughput levels", said Raul Camposano, Senior Vice President, CTO and General Manager, Silicon Engineering Group at Synopsys.
"The successful deployment of NanoSim at leading wireless companies like Atheros further demonstrates our commitment to continuously improve our market-leading simulator to address mixed-signal circuit simulation challenges".
• Synopsys: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page

