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RTL verification speeds TV processor to market

A Synopsys product story
Edited by the Electronicstalk editorial team Jun 24, 2005

The Synopsys VCS RTL verification solution has enabled STMicroelectronics to achieve its verification quality goals in half the time for its next-generation 90nm STD2000 family of HDTV processor.

The Synopsys VCS RTL verification solution, a key component of the Discovery Verification Platform, has enabled STMicroelectronics to achieve its verification quality goals in half the time for its next-generation 90nm STD2000 family of HDTV processor chips.

STMicroelectronics used VCS' high-performance, built-in coverage technology to help ensure verification completeness and to increase confidence in the quality of the 10-million-gate design targeted at television applications.

"We chose the VCS solution because it delivers the highest performance for the implementation of our coverage-driven verification environment", said Sebastien Francois, Verification Manager at STMicroelectronics.

"Our comprehensive regression suite tracks various coverage metrics to determine verification progress".

"With built-in, comprehensive coverage metrics, the VCS solution provides the performance and the breadth of coverage technologies required to achieve our verification goals in the given time".

The VCS solution delivers comprehensive coverage metrics, including functional, assertion, finite state machine, condition, path and toggle.

These coverage metrics are natively compiled in the VCS solution to deliver faster performance and to increase productivity by eliminating the need to instrument the design.

Additionally, the VCS solution provides the following critical coverage capabilities: auto-grading of coverage achieved from multiple tests, allowing designers to eliminate inefficient or redundant tests, saving wasted regression cycles; aggregation of reports from multiple regression runs to easily review total achieved coverage value; and the flexibility to turn on or off coverage tracking, saving valuable throughput time.

"We have expanded VCS from an HDL simulator into a comprehensive mixed-language RTL verification solution to enable customers designing complex chips, such as STMicroelectronics STD2000 family, to complete RTL verification tasks in less time", said Farhad Hayat, Vice President of Marketing, Verification Group, Synopsys.

"We continue to see rapid customer adoption of the built-in VCS bug-finding technologies, such as Native Testbench, comprehensive coverage and complete assertions".

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