Reference flow speeds Chinese IC design

Synopsys has jointly developed reference design flow 2.0 with Semiconductor Manufacturing International Corp, the largest foundry in China.

Synopsys has jointly developed reference design flow 2.0 with Semiconductor Manufacturing International Corp, the largest foundry in China.

SMIC and Synopsys Professional Services worked closely on the complete RTL-to-GDSII flow, which is based on Synopsys Galaxy Design Platform and SMIC's advanced 0.13-micron process.

The flow not only addresses deep submicron design challenges in 0.13-micron designs, but can also shorten time to market, and reduces time to yield.

New features in version 2.0 of the SMIC-Synopsys reference flow include advanced floor planning capabilities from Synopsys' JupiterXT design planning solution.

Specifically, the solution's power network synthesis (PNS) and power network analysis (PNA) capabilities are used to design the power plan at the floor planning stage.

Reference flow version 2.0 also features advanced signal integrity (SI) and IC reliability (IR/EM) analysis capabilities using Synopsys PrimeTime SI, Astro-Xtalk and Astro-Rail tools.

These features target electromigration (EM) challenges that commonly cause increased resistance in power grid paths and lead to increased IR drop or ground bounce.

EM also impacts timing and reliability.

Finally, version 2.0 introduces voltage-drop (IR-drop) analysis, which enables the user to analyse the impacts of timing, performance, functionality and noise immunity, and features IC reliability analysis to predict mean time between failures (MTBF).

"SMIC has been providing advanced 0.13-micron CMOS processes to customers worldwide for mass manufacturing since the first half of 2004".

"Version 2.0 reference flow provides customers a complete and proven design solution in advanced floor planning, SI closure, and IR/EM analysis, which are important to 0.13-micron designs", said Paul Ouyang, Vice President of Design Services at SMIC.

"The development of version 2.0 reference flow builds on our success and collaboration in developing the first version".

"We look forward to a continuing relationship with Synopsys as we move towards more advanced processes".

"SMIC and Synopsys are key technology partners of Datang Micro".

"The new features of the reference design flow that have resulted from their collaboration can be used by our engineers to help shorten design time and time to yield", said Zhao Lun, General Manager of Datang Microelectronics Technology Co.

"The comprehensive process portfolio offered by SMIC, and the proven design solutions from Synopsys are critical to meet our advanced design needs".

"Working closely with SMIC has enabled us to deliver reference flows that address the advanced deep submicron process needs of the growing Chinese market", said Rich Goldman, Vice President of Strategic Market Development at Synopsys.

"Synopsys will continue to work with SMIC to help ensure their customers can access a validated flow that shortens time to results for their complex ICs and systems".

Reference Design Flow 2.0 is available now.

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