Product category:
Design and Development Software
News Release from: Synopsys | Subject: RTL-to-GDSII low-power reference design flow
Edited by the Electronicstalk Editorial
Team on 02 March 2006
Reference design flow is enhanced for
90nm
An enhanced RTL-to-GDSII low-power reference design flow for the latest 90nm process is offered as part of the IBM-Chartered Semiconductor Manufacturing Common Platform.
Synopsys has delivered an enhanced version of its RTL-to-GDSII low-power reference design flow for the latest 90nm process offered as part of the IBM-Chartered Semiconductor Manufacturing Common Platform Combining the latest shared 90nm low-power process technology from the Common Platform, the ARM Metro low-power products, part of its family of Artisan physical IP, and Synopsys' expertise in design flows with a full complement of Synopsys Galaxy Design Platform implementation products, including IC Compiler, the reference design flow enables rapid design of highly complex devices while addressing signal integrity and power reduction requirements
This article was originally published on Electronicstalk on 21 Jul 2006 at 8.00am (UK)
Related stories
Extended RTL-to-GDSII low-power reference design
Extended RTL-to-GDSII low-power reference design flow for the latest 65-nanometer (nm) process offered by the IBM-Chartered Semiconductor Manufacturing-Samsung Common Platform technology initiative.
Synopsis adds crosstalk analysis to timing tool
Synopsys has extended its PrimeTime static timing analysis product to address the challenge of detecting and resolving crosstalk on SoC designs at 0.18 micron and below.
The reference flow allows designers to easily and accurately maintain process technology files, ARM Metro memories and standard cell and I/O libraries, and design data in a single consistent directory structure.
This flow uses advanced methodologies that take the designer through each step of the design process, maintaining data consistency through the Milkyway database and shared design constraint files.
The reference flow is consistent with the design flow in Synopsys Pilot Design Environment and can be extended and enhanced by designers to address design-specific requirements.
Further reading
Tensilica standardises on Physical Compiler
Tensilica has standardised on Synopsys Physical Compiler and developed a high-performance reference flow around Physical Compiler for its Xtensa V processor cores.
PCI core gets official seal of approval
In conjunction with IP 2001 Japan, Synopsys has announced the PCI Special Interest Group (PCI-SIG) certification of the DesignWare PCI-X MacroCell.
Power Compiler adds pushbutton power optimisation
Oki Semiconductor has added Power Compiler, Synopsys' pushbutton power optimisation tool for RTL and gate-level designs, to the set of Synopsys tools offered in Oki's advanced ASIC design kit.
Chartered and IBM have validated the complete reference flow on the Common Platform 90nm process using ARM Metro physical IP.
The reference flow supports both flat and hierarchical design techniques and includes Synopsys' IC Compiler, a next-generation place-and-route system.
IC Compiler transcends current generation solutions by offering three new technologies: extended physical synthesis (XPS), signoff driven design closure and design for yield.
These differentiating technologies allow IC Compiler to provide superior results and faster time to results.
Manufacturability is also addressed in the place-and-route technology files.
IC Compiler has a unified, TCL-based architecture that includes physical synthesis, placement, routing, yield, signal integrity (SI), test, and low-power design.
The resulting design can be manufactured at IBM or Chartered using the same GDSII file.
"The latest version of the Synopsys low-power reference flow provides important technology like IC Compiler and capabilities such as hierarchical physical design, allowing designers to create complex chips that minimise power and maximise performance", stated Steve Longoria, Vice President, Semiconductor Technology Platform for IBM Systems and Technology Group.
"Coupling the complete Synopsys design flow with the Common Platform's low-power 90nm process technology gives chip designers both next-generation design capability and manufacturing flexibility for their projects".
"Chartered and IBM have worked closely with Synopsys to refine and validate this reference flow using our latest technology files and we have independently validated the flow by taking a design all the way from RTL to verified GDSII", said Kevin Meyer, Vice-President of Worldwide Marketing and Platform Alliances at Chartered.
"Our validation of this reference flow demonstrates that customers will be able to apply it to their designs to create chips ready for manufacturing at Chartered or IBM with no rework required".
"ARM is excited to be continuing to drive the industry agenda for low power in a broad range of consumer devices", said Neal Carney, Vice-President of Marketing, Physical IP, ARM.
"The collaboration between ARM, IBM, Chartered and Synopsys provides real benefits to designers in delivering a low risk, proven path from design to silicon".
"The combination of proven physical IP, process technologies, and a complete design methodology is a major step forward for creation of the next-generation of 90nm low-power devices".
"The close collaboration between IBM, Chartered, ARM, and Synopsys has resulted in significant benefits for our customers such as reduction in project risk and time to production", said Guri Stark, Vice President of Marketing, Solutions Group at Synopsys.
"We have combined the latest Synopsys tools, the design and design flow expertise of our Professional Services team, the latest 90nm low-power technologies from IBM and Chartered, and the new ARM Metro libraries to produce a complete solution for next-generation designs".
The reference flow is available today at no charge to Synopsys customers.
• Synopsys: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
