Product category:
Design and Development Software
News Release from: Synopsys | Subject: IC Compiler
Edited by the Electronicstalk Editorial
Team on 31 March 2006
Place-and-route software speeds
production flow
STARC has adopted IC Compiler, Synopsys' next-generation place-and-route solution, in its newly released STARCAD-21 V3.0 production flow.
The Semiconductor Technology Academic Research Centre (STARC) has adopted IC Compiler, Synopsys' next-generation place-and-route solution, in its newly released STARCAD-21 V3.0 production flow STARC is an influential consortium of Japan's major semiconductor manufacturers that is seen as leading the way on advanced design methodologies in Japan
This article was originally published on Electronicstalk on 20 Feb 2006 at 8.00am (UK)
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STARC incorporated IC Compiler into the STARCAD-21 flow because it provides up to 2X faster run times and better quality of results (QoR) compared with the previous-generation STARCAD-21 flow.
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"Synopsys had very impressive projections when they first introduced us to IC Compiler", said Nobuyuki Nishiguchi, Vice President of the Design Methodology Group at STARC.
"We are happy to confirm that IC Compiler has indeed delivered 2x faster run times, better QoR, and smaller area for high-performance designs".
"This new release of STARCAD-21 with support for IC Compiler represents a big step forward for our member companies in achieving high designer productivity".
STARC has invested months of intensive effort to build the new STARCAD-21 flow and to thoroughly evaluate all its elements.
It delivered to its 11 members a flow with increased designer productivity that also supports a range of advanced capabilities in test, hierarchy, clock planning and low-power design.
To achieve these goals, STARC adopted not only IC Compiler, but also DFT MAX for test compression and Synopsys' new high-accuracy CCS library format.
CCS library models allowed STARC to reduce the design margin for on-chip variation by 5% and boosted productivity by providing a 50x speed-up in the development of noise libraries.
IC Compiler's unique extended physical synthesis (XPS) technology enables the STARCAD-21 flow to efficiently deal with increasingly common multi-mode designs.
IC Compiler's concurrent multi-mode capability was the key to significant improvements in performance and turnaround time.
For example, a RISC core with six operating modes and two process corners was concurrently optimised across all modes by IC Compiler.
Thanks to XPS' true concurrent optimisation for timing and area, there was a 5x improvement in turnaround time for post-detail routing optimisation.
Further efficiency gains were measured in STARCAD-21 resulting from the excellent correlation of IC Compiler to PrimeTime SI signoff timing and the simplified Tcl scripting.
"We are already seeing very strong momentum with IC Compiler in Japan", said Antun Domic, Senior Vice President and General Manager of Synopsys' Implementation Group.
"As major Japanese design houses are closely following developments at STARC, STARCAD-21 V3.0 featuring IC Compiler is an added boost".
"We look forward to working closely with customers to help them realise the productivity gains validated by STARC".
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