Product category:
Design and Development Software
News Release from: Synopsys | Subject: Sentaurus TCAD
Edited by the Electronicstalk Editorial
Team on 16 June 2006
TCAD tools run on dual-core processors
A new Sentaurus TCAD release adds significant process and device modelling capabilities for accelerated development of advanced technologies.
Synopsys has announced the availability of a new Sentaurus TCAD release that adds significant process and device modelling capabilities for accelerated development of advanced technologies, as well as full support for 64bit dual-core Intel Xeon processors With continued device migration to smaller process geometries and new technology nodes, TCAD tools are essential for developing and optimising semiconductor processes and devices, thereby significantly reducing technology development time and cost
This article was originally published on Electronicstalk on 24 Apr 2008 at 8.00am (UK)
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"Our customers use Synopsys' TCAD tools to solve technology challenges on a daily basis and achieve predictable success", said Wolfgang Fichtner, General Manager of the Synopsys TCAD Business Unit.
"The growing use of Sentaurus in semiconductor technology development and manufacturing requires ever-increasing computing power".
"The Intel Xeon processors allow our customers to take full advantage of TCAD simulations to more rapidly explore and optimise their technologies, leading to time and cost savings, as well as higher-yielding products".
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The Sentaurus Y-2006.06 release offers new modelling capabilities that enable customers to continue pushing the technology envelope for current and future generations of semiconductor technology.
These capabilities include simulating ultrashallow junctions used in leading-edge CMOS devices, modelling strained silicon for enhancing device performance, optimising optical and electrical characteristics for optoelectronics and studying novel structures on the atomistic level with kinetic process Monte Carlo and device Monte Carlo simulations.
"Many of our customers are faced with an increasing need for design computing performance and capacity to perform complex design and modelling work", said Martin Menard, General Manager and Director of Intel IT Platform Capability at Intel Corporation.
"We are excited to see the release of Synopsys' leading TCAD tools such as Sentaurus on Intel's Xeon processor 5000 sequence-based platforms (code named Bensley) to deliver high performance for large-scale TCAD simulations at a low cost".
Increased computing power makes it less expensive for semiconductor manufacturers to perform large-scale TCAD simulations as diverse as deep-submicron 3D effects, CMOS image sensors, nonvolatile memories, radiation single-event effects and ESD protection devices, thereby helping reduce experimental costs significantly.
The 64bit dual-core Intel Xeon processors offer the performance and throughput required to run large-scale TCAD simulations efficiently.
Customers involved in the technical development in manufacturing can also take advantage of parallel computing benefits of dual-core Intel Xeon processor-based platforms with the Sentaurus Parallel option to reduce simulation time.
Synopsys TCAD tools are used by process and device engineers at substantially all major semiconductor companies to develop and optimise semiconductor technologies.
Customers also use these tools to identify potential yield problems that need to be addressed before and during volume production.
Through proper calibration with prototype wafers and measurement data, TCAD tools can accurately predict the behaviour of silicon in the manufacturing line for advanced technology nodes.
This information, coupled with design tools, enables Synopsys to reach beyond traditional EDA boundaries and identify and address manufacturing problems early in the design process.
Ultimately, higher yield can be achieved with Synopsys' bidirectional link that provides a bridge between design and manufacturing, all the way from place-and-route to physical verification, resolution enhancement technology (RET), mask optimisation and TCAD.
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