Product category:
Design and Development Software
News Release from: Synopsys | Subject: TetraMAX
Edited by the Electronicstalk Editorial
Team on 29 September 2006
Automatic test pattern generator
accelerated
Enhancements to the TetraMAX automatic test pattern generator result in a typical speedup of three times or more in runtime performance across all design styles.
Synopsys has announced enhancements to its TetraMAX automatic test pattern generation (ATPG) product that result in a typical speedup of three times (3x) or more in runtime performance across all design styles compared with the previous version The faster ATPG runtime for both stuck-at and transition delay testing provides substantial productivity gains for designers involved in creating high-quality manufacturing tests
This article was originally published on Electronicstalk on 31 Oct 2001 at 8.00am (UK)
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TetraMAX TenX provides distributed processing for automatic test pattern generation.
"This is the second major performance enhancement Synopsys has engineered for TetraMAX in the span of a year", said Graham Etchells, Director of Test Marketing, Synopsys Implementation Group.
"Taken together, the two most recent TetraMAX versions have achieved on average more than a 12x speed-up in ATPG results".
"With this order-of-magnitude improvement in performance, our customers benefit from creating the same high-quality test patterns in just a fraction of the time".
Further reading
Deep submicron designs stand the test of time
The new releases of DFT Compiler and TetraMAX ATPG have improved design-for-test and automatic test pattern generation performance and pattern count for deep submicron designs.
Diagnostic tools boost IC yields
Taiwan Semiconductor Manufacturing Company (TSMC) has adopted Synopsys' TetraMAX yield diagnostic tools for its scan diagnostics service.
"We have observed between 3x and 5x increase in TetraMAX performance since the last product release", said Dave Moog, Director of Design Automation at Exar Corp, a leading provider of high-performance, mixed-signal silicon solutions for the worldwide communications infrastructure.
"This boost in ATPG throughput has reduced the amount of time needed to generate high-quality manufacturing tests at Exar".
The TetraMAX tool now also efficiently generates patterns for the very largest designs.
Unlike competing tools, the TetraMAX solution does not require partitioning of a large SoC to run ATPG separately on each block; instead it can generate patterns for the entire design at once.
Moreover, designers can take full advantage of the performance improvements to create more types of tests in the same amount of time it once took to generate only traditional stuck-at patterns.
For example, transition-delay and bridging tests are now frequently used to improve test quality for designs implemented at 90nm and below, because these tests target random and systematic defects not detected using traditional stuck-at tests.
The TetraMAX ATPG tool is optimised for a wide range of test methodologies.
Automated links between the TetraMAX solution and Synopsys' PrimeTime sign-off suite let designers easily translate both timing exceptions and critical timing paths from static timing analysis to generate robust, high-coverage, at-speed tests.
Designers can also easily import bridging pairs from Synopsys' Star-RCXT sign-off extraction tool which TetraMAX can use to generate bridging tests.
The TetraMAX tool is the only ATPG solution integrated with Synopsys' DFT MAX adaptive scan compression solution for reducing test costs.
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