Timing and noise models for nanometre processes

Composite Current Source timing and noise models allow the designer to reduce guard-band margins during design implementation and signoff

Synopsys and TSMC have announced the immediate availability of Composite Current Source (CCS) models for use in the TSMC 65 and 90nm process technologies.

Used in conjunction with the Synopsys Galaxy design platform, the high-accuracy CCS timing and noise models allow the designer to reduce guard-band margins during design implementation and signoff, thus improving quality of results and reducing design iterations.

CCS models are proven to deliver signoff-level accuracy to within 2 % of HSPICE simulation as seen at leading semiconductor companies.

"The latest advances in silicon technology pose new challenges in modelling nanometre effects", says Kuo Wu, Deputy Director of Design Service Marketing at TSMC.

"We worked closely with Synopsys to characterise and validate the CCS-based standard cell library models".

"By meeting the high-performance and low-power requirements of our 65nm process technology, the CCS based models allow us to provide a significant competitive advantage to our customers".

CCS modelling technology, part of the open-source Liberty library modelling standard, enables highly accurate and comprehensive modelling of nanometre effects that encompass timing, signal integrity and power.

CCS modelling technology constitutes the foundation for modelling variations.

CCS models are designed to be scalable for voltage, temperature and process.

They enable voltage variation modelling, simplifying advanced low power design flows such as multi-Vt and multi-Vdd, as well as dynamic voltage and frequency scaling.

There is significant industry wide momentum behind CCS modelling technology with library availability from leading foundries, intellectual property vendors and integrated device manufacturers.

"Synopsys recognises the need to deliver complete design implementation and signoff solutions that reap the benefits of the latest silicon technologies", says Bijan Kiani, Vice President of Marketing, Synopsys Implementation Group.

"CCS modelling support from market and technology leading companies like TSMC will ensure that our mutual customers have access to validated IP that delivers higher accuracy and better performance when used with the Galaxy design platform".

The TSMC standard-cell libraries enabled with CCS modelling technology for the 65G+ and 65LP as well as the 90G, 90GT and 90LP processes are available immediately through the Synopsys DesignWare library at no additional cost to current licensees.

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