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ASIC company standardises on timing tools

A Synopsys product story
Edited by the Electronicstalk editorial team Mar 12, 2007

Fujitsu standardises on tools for static timing analysis, delay calculation and interconnect parasitic extraction.

Fujitsu has standardised on Synopsys' PrimeTime and Star-RCXT products as the timing sign-off solution for its 65nm ASIC and COT design flows.

The seamless integration of static timing analysis, delay calculation and interconnect parasitic extraction combined with the high accuracy delivered by Synopsys' gold-standard tools will enable Fujitsu and its customers to achieve faster design closure.

"A sign-off solution that ensures silicon accuracy while providing high performance and capacity is extremely important to our design flows at 65nm and below", says Shoji Ichino, General Manager, Design Platform Development Division, Electronic Devices Business Unit of Fujitsu Limited.

"We extended our usage of the Star-RCXT and PrimeTime products to our 65nm process because of Star-RCXT's proven sub-femtofarad-accurate extraction technology and PrimeTime's advanced analysis capabilities for designs at the 65nm process nodes".

"Together, the Star-RCXT and PrimeTime products provide the rich set of features, ease-of-use and speed that are already delivering significant productivity benefits on our largest, most advanced production designs".

"Synopsys continues to advance its proven timing analysis and extraction capabilities and deliver the best-in-class sign-off solution for our customers at the 65nm process node", says Antun Domic, Senior Vice President and General Manager of Synopsys' Implementation Group.

"Fujitsu's adoption of the combined PrimeTime and Star-RCXT solution for their 65nm design flows once again demonstrates the trust that leading semiconductor companies have placed in our gold standard sign-off solution".

"We look forward to continue working closely with Fujitsu to extend the benefits of our solution to process nodes beyond 65 nm".

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