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Product category: Design and Development Software
News Release from: Synopsys | Subject: 2007.03 release of IC Compiler
Edited by the Electronicstalk Editorial Team on 19 April 2007

Place and route software supports 45nm
process

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Place and route software has faster runtime, higher capacity, smarter multi-corner/multi-mode optimisations, improved predictability and physical design support for the 45nm technology wave.

The 2007.03 release of IC Compiler, Synopsys' next generation place and route software, heralds significant advances in IC designer productivity through faster runtime, higher capacity, smarter multi-corner/multi-mode (MCMM) optimisations, and improved predictability The release also rolls out physical design support for the emerging 45nm technology wave

IC Compiler has more than US $100 million in cumulative customer orders and nearly 100 active customer designs.

"2007.03 is the most significant release of IC Compiler yet, delivering strong advantages for a large group of users", says Antun Domic, Senior Vice President and General Manager of Synopsys' Implementation Group.

"The release provides advances in core technology, benefiting users across the board".

"It also delivers improved productivity through higher automation in key functions such as MCMM optimisations and signoff driven timing closure".

IC Compiler 2007.03 introduces new technology for the fastest operating mode which can deliver 35% runtime improvement without trading off quality of results.

Coupled with improved capacity approaching 10 million gates on 16Gbyte platforms, this new technology allows users to take on larger block partitions.

The release adds early access to integrated hierarchical design planning, enabling users to efficiently tackle designs in the 100 million gate range.

Another key productivity-enhancing capability is the physical feasibility flow, which allows users to quickly generate and analyse multiple trial floorplans to determine the best starting point for detailed implementation.

For advanced designs, IC Compiler 2007.03 introduces Adaptive MCMM optimisation technology, which delivers faster runtime and smaller memory utilisation WHILE providing the same level of accuracy.

IC Compiler's approach to implementing truly concurrent optimisation for designs with multiple modes and corners is an immense advantage for advanced users.

These users cannot afford the scheduling impact of sequential optimisation or accept the less accurate merging technique employed by other place and route tools.

The advanced designs also benefit from IC Compiler's signoff driven timing closure which is now available as a production capability.

For emerging 45nm designs, IC Compiler 2007.03 provides early support to leading edge customers in the form of 45nm placement and routing design rules.

It also meets the new requirements for lithography compliance and chemical mechanical polishing related metal uniformity.

Today, Synopsys is partnering with major semiconductor vendors worldwide to ramp production support for 45nm design implementation.

As with 90nm and 65nm designs, Synopsys' physical implementation solution is the first in enabling tapeouts at 45nm.

The IC Compiler 2007.03 release is available immediately.

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